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authorMartin Roth <martinroth@google.com>2016-10-01 20:13:43 -0600
committerMartin Roth <martinroth@google.com>2016-10-04 19:10:52 +0200
commitfb190ed764450208c393a43da4ab15b0f9ccbe58 (patch)
treebf57feecd31f158c9f44b4a8a4019ffa7ae54563 /src/northbridge/intel/gm45/pcie.c
parent58afca4a1a09f6bb4c28de460791984002408cdc (diff)
util/release: Update genrelnotes.script to the latest version
Internal changes: - Fix shellcheck issues. - Add some help text and update section header text. - Reorder sections to try to get better estimates of what the commits were mainly touching. - Start making the script slightly less coreboot-centric. - Don't print git errors. Changes in output: - Find new and deleted CPUs, SOCs, northbridges, southbridges, and SIOs. - Show new users. - Show before and after commit count for all authors. Change-Id: I9858436f9458b2859a91273a525901df34796df4 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/16848 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/northbridge/intel/gm45/pcie.c')
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