diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2020-09-15 14:30:13 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-09-25 19:40:44 +0000 |
| commit | 3378de12f63e8f5a2e0db1c13261fdc62804ba5f (patch) | |
| tree | 0d1d6f5affb265024f4b5bf882a05c140b0c3531 /src/northbridge/intel/gm45/pcie.c | |
| parent | e60155ff13fb61c20e01601e6a58ff1fe5509b8b (diff) | |
nb/intel/gm45: Drop casts from DEFAULT_{MCHBAR,DMIBAR}
There's no need to wrap these macros with casts. Removing them allows
dropping `uintptr_t` casts in other files. Changes the binary, though.
Change-Id: I1553cbeee45972d6deba8cb9969c69fceeb19574
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45432
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/gm45/pcie.c')
| -rw-r--r-- | src/northbridge/intel/gm45/pcie.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/intel/gm45/pcie.c b/src/northbridge/intel/gm45/pcie.c index 5a4999e4b0..0eb1287f3b 100644 --- a/src/northbridge/intel/gm45/pcie.c +++ b/src/northbridge/intel/gm45/pcie.c @@ -250,7 +250,7 @@ static void setup_rcrb(const int peg_enabled) /* Link1: component ID 1, link valid. */ EPBAR32(EPLE1D) = (EPBAR32(EPLE1D) & 0xff000000) | (1 << 16) | (1 << 0); - EPBAR32(EPLE1A) = (uintptr_t)DEFAULT_DMIBAR; + EPBAR32(EPLE1A) = DEFAULT_DMIBAR; if (peg_enabled) /* Link2: link_valid. */ @@ -268,7 +268,7 @@ static void setup_rcrb(const int peg_enabled) /* Link2: component ID 1 (MCH), link valid */ DMIBAR32(DMILE2D) = (DMIBAR32(DMILE2D) & 0xff000000) | (1 << 16) | (1 << 0); - DMIBAR32(DMILE2A) = (uintptr_t)DEFAULT_MCHBAR; + DMIBAR32(DMILE2A) = DEFAULT_MCHBAR; } void gm45_late_init(const stepping_t stepping) |