diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-01-31 22:47:09 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-02-06 11:09:23 +0000 |
| commit | 3b0eb602b99f5f3ae3137263b6040f78a314c2aa (patch) | |
| tree | 1451f7a596e42dbc31f0bff7683f71da51f4fad7 /src/northbridge/intel/gm45/gm45.h | |
| parent | 1bde3124b487ae76e8d5433eba0ba8c58c67a7ea (diff) | |
nb/intel/gm45: Use a common romstage
This moves a lot of the common romstage boilerplate code to a common
location, while adding a few mainboard specific hooks.
Another difference is that the settings for enable_igd and enable_peg
are now based on the static devicetree settings.
Change-Id: I30ef7f6962aabde78b5c40e0b53bb85e01c254c1
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/31190
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/northbridge/intel/gm45/gm45.h')
| -rw-r--r-- | src/northbridge/intel/gm45/gm45.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/northbridge/intel/gm45/gm45.h b/src/northbridge/intel/gm45/gm45.h index 736d6af6bd..0096793c23 100644 --- a/src/northbridge/intel/gm45/gm45.h +++ b/src/northbridge/intel/gm45/gm45.h @@ -436,6 +436,13 @@ u32 decode_tseg_size(u8 esmramc); void init_iommu(void); +/* romstage mainboard hookups */ +void mb_setup_lpc(void); +void mb_setup_superio(void); /* optional */ +void get_mb_spd_addrmap(u8 spd_addrmap[4]); +void mb_pre_raminit_setup(sysinfo_t *); /* optional */ +void mb_post_raminit_setup(void); /* optional */ + struct blc_pwm_t { char ascii_string[13]; int pwm_freq; /* In Hz */ |