diff options
author | Angel Pons <th3fanbus@gmail.com> | 2021-01-20 00:36:31 +0100 |
---|---|---|
committer | Angel Pons <th3fanbus@gmail.com> | 2021-02-07 20:20:00 +0000 |
commit | f462b3d379198c968467053f570d6a40c9c8a715 (patch) | |
tree | 06da018e6740df91f9d7fcbd9d18fa600efcc2dd /src/northbridge/intel/gm45/gm45.h | |
parent | dd1fb4e38c209f4713d80ae192bd8f4cb4ed0e32 (diff) |
nb/intel/gm45: Factor out {DMI,EP,MCH}BAR accessors
These accessors can be reused for several other northbridges.
Tested with BUILD_TIMELESS=1, Roda RK9 remains identical.
Change-Id: Ia16ccc63dddebf938f4e9a7f5518e4d25d3e7e66
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49748
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/gm45/gm45.h')
-rw-r--r-- | src/northbridge/intel/gm45/gm45.h | 12 |
1 files changed, 1 insertions, 11 deletions
diff --git a/src/northbridge/intel/gm45/gm45.h b/src/northbridge/intel/gm45/gm45.h index ae8b8390ca..b6e7c2f2b1 100644 --- a/src/northbridge/intel/gm45/gm45.h +++ b/src/northbridge/intel/gm45/gm45.h @@ -218,9 +218,7 @@ enum { * MCHBAR */ -#define MCHBAR8(x) (*((volatile u8 *)(DEFAULT_MCHBAR + (x)))) -#define MCHBAR16(x) (*((volatile u16 *)(DEFAULT_MCHBAR + (x)))) -#define MCHBAR32(x) (*((volatile u32 *)(DEFAULT_MCHBAR + (x)))) +#include <northbridge/intel/common/fixed_bars.h> #define HPLLVCO_MCHBAR 0x0c0f @@ -342,10 +340,6 @@ enum { * DMIBAR */ -#define DMIBAR8(x) (*((volatile u8 *)(DEFAULT_DMIBAR + (x)))) -#define DMIBAR16(x) (*((volatile u16 *)(DEFAULT_DMIBAR + (x)))) -#define DMIBAR32(x) (*((volatile u32 *)(DEFAULT_DMIBAR + (x)))) - #define DMIVCECH 0x000 /* 32bit */ #define DMIPVCCAP1 0x004 /* 32bit */ @@ -374,10 +368,6 @@ enum { * EPBAR */ -#define EPBAR8(x) (*((volatile u8 *)(DEFAULT_EPBAR + (x)))) -#define EPBAR16(x) (*((volatile u16 *)(DEFAULT_EPBAR + (x)))) -#define EPBAR32(x) (*((volatile u32 *)(DEFAULT_EPBAR + (x)))) - #define EPPVCCAP1 0x004 /* 32bit */ #define EPPVCCTL 0x00c /* 32bit */ |