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authorAngel Pons <th3fanbus@gmail.com>2020-09-16 13:29:21 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-10-24 20:42:32 +0000
commit2f30e8ca03602c14fd98527f1ea54d2a80e4fd63 (patch)
tree7a9822acb3e6e78e9dec4d758ed54d81d538a70b /src/northbridge/intel/gm45/acpi/gm45.asl
parentae2a5228277f3c5b00c29e6f9567ced67309f064 (diff)
nb/intel/gm45: Clean up header handling
There's no need to have ACPI guards in `gm45.h`, since the only things the ASL files require are the base address definitions in `memmap.h`. Also, remove the southbridge include from `gm45.h` and place it only in the files that actually require something from it. Tested with BUILD_TIMELESS=1, Roda RK9 remains identical. Change-Id: Ica2c5ae9f57595c8577a1bfcc3b57f2c57b3e980 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45452 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/gm45/acpi/gm45.asl')
-rw-r--r--src/northbridge/intel/gm45/acpi/gm45.asl3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/northbridge/intel/gm45/acpi/gm45.asl b/src/northbridge/intel/gm45/acpi/gm45.asl
index af58e0e712..e4d8d66993 100644
--- a/src/northbridge/intel/gm45/acpi/gm45.asl
+++ b/src/northbridge/intel/gm45/acpi/gm45.asl
@@ -1,7 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include "hostbridge.asl"
-#include "../gm45.h"
+#include "../memmap.h"
+#include <southbridge/intel/i82801ix/i82801ix.h>
#include <southbridge/intel/common/rcba.h>
/* PCI Device Resource Consumption */