aboutsummaryrefslogtreecommitdiff
path: root/src/northbridge/intel/gm45/acpi/gm45.asl
diff options
context:
space:
mode:
authorAngel Pons <th3fanbus@gmail.com>2021-01-20 13:13:26 +0100
committerAngel Pons <th3fanbus@gmail.com>2021-01-30 23:12:54 +0000
commit1ac6f8b804b0be461f5254a6bace3a9823177ba3 (patch)
tree744bf868703e1e941da2ebcded0793b041fb2efc /src/northbridge/intel/gm45/acpi/gm45.asl
parentbbc80f4405a1ba12ad444ef900da6a55d63f45b8 (diff)
nb/intel/gm45: Define and use MMCONF_BUS_NUMBER
Change-Id: I635f3615f566502f79bbd81f9f743ce63bba3b1a Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49758 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/gm45/acpi/gm45.asl')
-rw-r--r--src/northbridge/intel/gm45/acpi/gm45.asl2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/gm45/acpi/gm45.asl b/src/northbridge/intel/gm45/acpi/gm45.asl
index f13133d6ef..7f642194ba 100644
--- a/src/northbridge/intel/gm45/acpi/gm45.asl
+++ b/src/northbridge/intel/gm45/acpi/gm45.asl
@@ -18,7 +18,7 @@ Device (PDRC)
Memory32Fixed(ReadWrite, DEFAULT_MCHBAR, 0x00004000)
Memory32Fixed(ReadWrite, DEFAULT_DMIBAR, 0x00001000)
Memory32Fixed(ReadWrite, DEFAULT_EPBAR, 0x00001000)
- Memory32Fixed(ReadWrite, CONFIG_MMCONF_BASE_ADDRESS, 0x04000000)
+ Memory32Fixed(ReadWrite, CONFIG_MMCONF_BASE_ADDRESS, CONFIG_MMCONF_LENGTH)
Memory32Fixed(ReadWrite, 0xfed20000, 0x00020000) // Misc ICH
Memory32Fixed(ReadWrite, 0xfed40000, 0x00005000) // Misc ICH
Memory32Fixed(ReadWrite, 0xfed45000, 0x0004b000) // Misc ICH