diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-02-09 08:38:14 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-04-30 09:24:11 +0000 |
| commit | 09d1d5969d6a1781c4efe5df02d2add83fbbd321 (patch) | |
| tree | 29de18b446b8d593f5368bf7d30bba53ba1e9927 /src/northbridge/intel/fsp_rangeley/northbridge.c | |
| parent | f925c56fe9e99811ba2e8f012d9116cac3092f96 (diff) | |
nb/intel/fsp_rangeley: Get rid of device_t
Use of `device_t` has been abandoned in ramstage.
Change-Id: I0b969a5109276d108e6140bad338c74786b967f3
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/23671
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/northbridge/intel/fsp_rangeley/northbridge.c')
| -rw-r--r-- | src/northbridge/intel/fsp_rangeley/northbridge.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/src/northbridge/intel/fsp_rangeley/northbridge.c b/src/northbridge/intel/fsp_rangeley/northbridge.c index 0134eff568..22e6cee634 100644 --- a/src/northbridge/intel/fsp_rangeley/northbridge.c +++ b/src/northbridge/intel/fsp_rangeley/northbridge.c @@ -59,7 +59,7 @@ static const int legacy_hole_size_k = 384; static int get_pcie_bar(u32 *base) { - device_t dev; + struct device *dev; u32 pciexbar_reg; *base = 0; @@ -94,7 +94,7 @@ static int add_fixed_resources(struct device *dev, int index) return index; } -static void mc_add_dram_resources(device_t dev) +static void mc_add_dram_resources(struct device *dev) { u32 tomlow, bmbound, bsmmrrl, bsmmrrh; u64 bmbound_hi; @@ -139,7 +139,7 @@ static void mc_add_dram_resources(device_t dev) index = add_fixed_resources(dev, index); } -static void mc_read_resources(device_t dev) +static void mc_read_resources(struct device *dev) { u32 pcie_config_base; int buses; @@ -158,7 +158,7 @@ static void mc_read_resources(device_t dev) mc_add_dram_resources(dev); } -static void pci_domain_set_resources(device_t dev) +static void pci_domain_set_resources(struct device *dev) { /* * Assign memory resources for PCI devices @@ -168,13 +168,13 @@ static void pci_domain_set_resources(device_t dev) assign_resources(dev->link_list); } -static void mc_set_resources(device_t dev) +static void mc_set_resources(struct device *dev) { /* Call the normal set_resources */ pci_dev_set_resources(dev); } -static void intel_set_subsystem(device_t dev, unsigned vendor, unsigned device) +static void intel_set_subsystem(struct device *dev, unsigned vendor, unsigned device) { if (!vendor || !device) { pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, @@ -189,7 +189,7 @@ static void northbridge_init(struct device *dev) { } -static void northbridge_enable(device_t dev) +static void northbridge_enable(struct device *dev) { } @@ -239,7 +239,7 @@ static const struct pci_driver mc_driver __pci_driver = { .devices = pci_device_ids, }; -static void cpu_bus_init(device_t dev) +static void cpu_bus_init(struct device *dev) { initialize_cpus(dev->link_list); } @@ -252,7 +252,7 @@ static struct device_operations cpu_bus_ops = { .scan_bus = 0, }; -static void enable_dev(device_t dev) +static void enable_dev(struct device *dev) { /* Set the operations if it is a special bus type */ if (dev->path.type == DEVICE_PATH_DOMAIN) { |