aboutsummaryrefslogtreecommitdiff
path: root/src/northbridge/intel/fsp_rangeley/fsp
diff options
context:
space:
mode:
authorElyes HAOUAS <ehaouas@noos.fr>2016-08-23 21:29:48 +0200
committerMartin Roth <martinroth@google.com>2016-08-31 20:30:03 +0200
commit12df9505835393239d9e9589cff39a1d1dfddac1 (patch)
treeffc470b0ff74d818cd6f0dc5cd750fd414c8d960 /src/northbridge/intel/fsp_rangeley/fsp
parent5a7e72f1aef02b326a67d883d92fe8c0aad9f3a9 (diff)
northbridge/intel: Add required space before opening parenthesis '('
Change-Id: I53208ce5db06d2c65f954e6d59222924ab87722e Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16304 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/intel/fsp_rangeley/fsp')
-rw-r--r--src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c20
1 files changed, 10 insertions, 10 deletions
diff --git a/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c b/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c
index 1cc1bc009f..2ac1a2363a 100644
--- a/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c
+++ b/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c
@@ -63,38 +63,38 @@ static void ConfigureDefaultUpdData(UPD_DATA_REGION *UpdData)
config = dev->chip_info;
/* Set SPD addresses */
- if(config->SpdBaseAddress_0_0) {
+ if (config->SpdBaseAddress_0_0) {
UpdData->PcdSpdBaseAddress_0_0 = config->SpdBaseAddress_0_0;
}
- if(config->SpdBaseAddress_0_1) {
+ if (config->SpdBaseAddress_0_1) {
UpdData->PcdSpdBaseAddress_0_1 = config->SpdBaseAddress_0_1;
}
- if(config->SpdBaseAddress_1_0) {
+ if (config->SpdBaseAddress_1_0) {
UpdData->PcdSpdBaseAddress_1_0 = config->SpdBaseAddress_1_0;
}
- if(config->SpdBaseAddress_1_1) {
+ if (config->SpdBaseAddress_1_1) {
UpdData->PcdSpdBaseAddress_1_1 = config->SpdBaseAddress_1_1;
}
- if(config->EccSupport) {
+ if (config->EccSupport) {
UpdData->PcdEccSupport = config->EccSupport;
}
- if(config->PrintDebugMessages) {
+ if (config->PrintDebugMessages) {
UpdData->PcdPrintDebugMessages = config->PrintDebugMessages;
}
- if(config->Bifurcation) {
+ if (config->Bifurcation) {
UpdData->PcdBifurcation = config->Bifurcation;
}
- if(config->MemoryDown) {
+ if (config->MemoryDown) {
UpdData->PcdMemoryDown = config->MemoryDown;
}
UpdData->PcdMrcInitTsegSize = CONFIG_SMM_TSEG_SIZE >> 20;
- if(config->MrcRmtCpgcExpLoopCntValue) {
+ if (config->MrcRmtCpgcExpLoopCntValue) {
UpdData->PcdMrcRmtCpgcExpLoopCntValue =
config->MrcRmtCpgcExpLoopCntValue;
}
- if(config->MrcRmtCpgcNumBursts) {
+ if (config->MrcRmtCpgcNumBursts) {
UpdData->PcdMrcRmtCpgcNumBursts = config->MrcRmtCpgcNumBursts;
}
#if IS_ENABLED(CONFIG_ENABLE_FSP_FAST_BOOT)