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authorVladimir Serbinenko <phcoder@gmail.com>2014-10-11 11:25:41 +0200
committerVladimir Serbinenko <phcoder@gmail.com>2014-11-08 20:12:31 +0100
commit689ddf68323633ec96cf6455d8a323fb6f019503 (patch)
treedbd44ed8952145db39d3330719e7a733c158530f /src/northbridge/intel/fsp_rangeley/acpi.c
parent67bfbfdfebb280fae5d2aac5e68bb8f014a7de71 (diff)
fsp_rangeley: Switch to per-device ACPI
Change-Id: Ic8b2204a6d08d63ac7f05836bf1424f1ca6ee50e Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7046 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/northbridge/intel/fsp_rangeley/acpi.c')
-rw-r--r--src/northbridge/intel/fsp_rangeley/acpi.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/src/northbridge/intel/fsp_rangeley/acpi.c b/src/northbridge/intel/fsp_rangeley/acpi.c
index 895f5b4861..b2ddc88f93 100644
--- a/src/northbridge/intel/fsp_rangeley/acpi.c
+++ b/src/northbridge/intel/fsp_rangeley/acpi.c
@@ -30,6 +30,8 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <build.h>
+#include <arch/acpi.h>
+#include <arch/acpigen.h>
#include "northbridge.h"
unsigned long acpi_fill_mcfg(unsigned long current)
@@ -64,3 +66,15 @@ unsigned long acpi_fill_mcfg(unsigned long current)
return current;
}
+
+void northbridge_acpi_fill_ssdt_generator(void)
+{
+ u32 bmbound;
+ char pscope[] = "\\_SB.PCI0";
+
+ bmbound = sideband_read(B_UNIT, BMBOUND);
+ acpigen_write_scope(pscope);
+ acpigen_write_name_dword("BMBD", bmbound);
+ acpigen_pop_len();
+ generate_cpu_entries();
+}