diff options
| author | Uwe Hermann <uwe@hermann-uwe.de> | 2006-10-27 11:40:01 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2006-10-27 11:40:01 +0000 |
| commit | cf201870797d542915b2c52fa596b27c1616a821 (patch) | |
| tree | 91ce83bc599b0cf58c175da717369d003b062fb2 /src/northbridge/intel/e7525/e7525.h | |
| parent | 586470c646ac1b8753858b013b268f049a28b818 (diff) | |
svn mv src/northbridge/intel/E7520 src/northbridge/intel/e7520
svn mv src/northbridge/intel/E7525 src/northbridge/intel/e7525
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2478 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/intel/e7525/e7525.h')
| -rw-r--r-- | src/northbridge/intel/e7525/e7525.h | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/src/northbridge/intel/e7525/e7525.h b/src/northbridge/intel/e7525/e7525.h new file mode 100644 index 0000000000..be76303d4f --- /dev/null +++ b/src/northbridge/intel/e7525/e7525.h @@ -0,0 +1,44 @@ +#define VID 0X00 +#define DID 0X02 +#define PCICMD 0X04 +#define PCISTS 0X06 +#define RID 0X08 +#define IURBASE 0X14 +#define MCHCFG0 0X50 +#define MCHSCRB 0X52 +#define FDHC 0X58 +#define PAM 0X59 +#define DRB 0X60 +#define DRA 0X70 +#define DRT 0X78 +#define DRC 0X7C +#define DRM 0X80 +#define DRORC 0X82 +#define ECCDIAG 0X84 +#define SDRC 0X88 +#define CKDIS 0X8C +#define CKEDIS 0X8D +#define DDRCSR 0X9A +#define DEVPRES 0X9C +#define DEVPRES_D0F0 (1 << 0) +#define DEVPRES_D1F0 (1 << 1) +#define DEVPRES_D2F0 (1 << 2) +#define DEVPRES_D3F0 (1 << 3) +#define DEVPRES_D4F0 (1 << 4) +#define DEVPRES_D5F0 (1 << 5) +#define DEVPRES_D6F0 (1 << 6) +#define DEVPRES_D7F0 (1 << 7) +#define ESMRC 0X9D +#define SMRC 0X9E +#define EXSMRC 0X9F +#define DDR2ODTC 0XB0 +#define TOLM 0XC4 +#define REMAPBASE 0XC6 +#define REMAPLIMIT 0XC8 +#define REMAPOFFSET 0XCA +#define TOM 0XCC +#define EXPECBASE 0XCE +#define DEVPRES1 0XF4 +#define DEVPRES1_D0F1 (1 << 5) +#define DEVPRES1_D8F0 (1 << 1) +#define MSCFG 0XF6 |