diff options
author | Stefan Reinauer <stepan@coresystems.de> | 2009-06-30 15:17:49 +0000 |
---|---|---|
committer | Stefan Reinauer <stepan@openbios.org> | 2009-06-30 15:17:49 +0000 |
commit | 0867062412dd4bfe5a556e5f3fd85ba5b682d79b (patch) | |
tree | 81ca5db12b8567b48daaa23a541bfb8a5dc011f8 /src/northbridge/intel/e7520 | |
parent | 9702b6bf7ec5a4fb16934f1cf2724480e2460c89 (diff) |
This patch unifies the use of config options in v2 to all start with CONFIG_
It's basically done with the following script and some manual fixup:
VARS=`grep ^define src/config/Options.lb | cut -f2 -d\ | grep -v ^CONFIG | grep -v ^COREBOOT |grep -v ^CC`
for VAR in $VARS; do
find . -name .svn -prune -o -type f -exec perl -pi -e "s/(^|[^0-9a-zA-Z_]+)$VAR($|[^0-9a-zA-Z_]+)/\1CONFIG_$VAR\2/g" {} \;
done
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4381 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/intel/e7520')
-rw-r--r-- | src/northbridge/intel/e7520/Config.lb | 6 | ||||
-rw-r--r-- | src/northbridge/intel/e7520/northbridge.c | 4 |
2 files changed, 5 insertions, 5 deletions
diff --git a/src/northbridge/intel/e7520/Config.lb b/src/northbridge/intel/e7520/Config.lb index 03a78974d4..dbbd3aae24 100644 --- a/src/northbridge/intel/e7520/Config.lb +++ b/src/northbridge/intel/e7520/Config.lb @@ -1,4 +1,4 @@ -uses HAVE_HIGH_TABLES +uses CONFIG_HAVE_HIGH_TABLES config chip.h driver northbridge.o @@ -7,10 +7,10 @@ driver pciexp_porta1.o driver pciexp_portb.o driver pciexp_portc.o -default HAVE_HIGH_TABLES=1 +default CONFIG_HAVE_HIGH_TABLES=1 makerule raminit_test depends "$(TOP)/src/northbridge/intel/e7520/raminit_test.c" depends "$(TOP)/src/northbridge/intel/e7520/raminit.c" - action "$(HOSTCC) $(HOSTCFLAGS) $(CPUFLAGS) -Wno-unused-function -I$(TOP)/src/include -g $< -o $@" + action "$(CONFIG_HOSTCC) $(HOSTCFLAGS) $(CPUFLAGS) -Wno-unused-function -I$(TOP)/src/include -g $< -o $@" end diff --git a/src/northbridge/intel/e7520/northbridge.c b/src/northbridge/intel/e7520/northbridge.c index f2b2a0f3a0..47e6266aa6 100644 --- a/src/northbridge/intel/e7520/northbridge.c +++ b/src/northbridge/intel/e7520/northbridge.c @@ -76,7 +76,7 @@ static uint32_t find_pci_tolm(struct bus *bus) return tolm; } -#if HAVE_HIGH_TABLES==1 +#if CONFIG_HAVE_HIGH_TABLES==1 #define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB extern uint64_t high_tables_base, high_tables_size; #endif @@ -169,7 +169,7 @@ static void pci_domain_set_resources(device_t dev) (remaplimitk + 64*1024) - remapbasek); } -#if HAVE_HIGH_TABLES==1 +#if CONFIG_HAVE_HIGH_TABLES==1 /* Leave some space for ACPI, PIRQ and MP tables */ high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024; high_tables_size = HIGH_TABLES_SIZE * 1024; |