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| author | Patrick Georgi <pgeorgi@google.com> | 2021-02-12 13:49:11 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-02-15 11:30:40 +0000 |
| commit | 6b688f5329e560ef432f6ea281b2fe3d905ef297 (patch) | |
| tree | 831ff654f7477b293421e38b8ed880f2cc740386 /src/northbridge/intel/e7505 | |
| parent | 036d66be051c4aeeac3b6220974e93645489c27d (diff) | |
src: use ARRAY_SIZE where possible
Generated with a variant of
https://coccinelle.gitlabpages.inria.fr/website/rules/array.cocci
Change-Id: I083704fd48faeb6c67bba3367fbcfe554a9f7c66
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50594
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/e7505')
| -rw-r--r-- | src/northbridge/intel/e7505/raminit.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/e7505/raminit.c b/src/northbridge/intel/e7505/raminit.c index 4822ead662..4a8cf9057a 100644 --- a/src/northbridge/intel/e7505/raminit.c +++ b/src/northbridge/intel/e7505/raminit.c @@ -92,7 +92,7 @@ static const uint32_t refresh_rate_map[] = { 1, 7, 2, 1, 1, 3 }; -#define MAX_SPD_REFRESH_RATE ((sizeof(refresh_rate_map) / sizeof(uint32_t)) - 1) +#define MAX_SPD_REFRESH_RATE (ARRAY_SIZE(refresh_rate_map) - 1) // SPD parameters that must match for dual-channel operation static const uint8_t dual_channel_parameters[] = { |