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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2012-04-10 19:55:19 +0300 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-04-11 23:25:09 +0200 |
| commit | 5c1ff9284a7ac382a9ec702fa52f3a173279d566 (patch) | |
| tree | ff8d7d75c484aedeb4337621670e4a406f799e4b /src/northbridge/intel/e7505/reset_test.c | |
| parent | 5bd271b9fa81532f786f42604d94df92f44b605f (diff) | |
Intel e7505: cleanups
Fix delay loop comments. Time waited and the comments did not match
in the origin (e7501), so delays currently "just work".
Move reset detection to main raminit and don't use generic
sdram_initialize for now, as there are local debug
functions I need to use. Fix AOpen respectively.
Disable ecc scrub, until I have it fixed for cache-as-ram use.
Change-Id: I0529297f43c565d30b5fb7d1836700278ac029c4
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/883
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/northbridge/intel/e7505/reset_test.c')
| -rw-r--r-- | src/northbridge/intel/e7505/reset_test.c | 18 |
1 files changed, 0 insertions, 18 deletions
diff --git a/src/northbridge/intel/e7505/reset_test.c b/src/northbridge/intel/e7505/reset_test.c deleted file mode 100644 index 1c0dad5ed9..0000000000 --- a/src/northbridge/intel/e7505/reset_test.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Convert to C by yhlu */ -#define MCH_DRC 0x7c -#define DRC_DONE (1 << 29) - /* If I have already booted once skip a bunch of initialization */ - /* To see if I have already booted I check to see if memory - * has been enabled. - */ -static int bios_reset_detected(void) { - uint32_t dword; - - dword = pci_read_config32(PCI_DEV(0, 0, 0), MCH_DRC); - - if( (dword & DRC_DONE) != 0 ) { - return 1; - } - - return 0; -} |