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| author | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2011-10-27 18:42:53 +0200 |
|---|---|---|
| committer | Patrick Georgi <patrick@georgi-clan.de> | 2011-10-28 09:09:40 +0200 |
| commit | ea5c2b62caec8a2acd5298777b825b799e2b9c15 (patch) | |
| tree | 293aa3b0d6c9a986f3a0cd416ce41e9961f55acc /src/northbridge/intel/e7505/northbridge.c | |
| parent | 113c3497201a28fd58335788da5e206ea8902b90 (diff) | |
Fix checksum calculation both in romstage and ramstage.
The earlier fix for CMOS checksums only fixed the function rtc_set_checksum,
which would fix the checksum, but then coreboot would no longer honor the
settings because it assumed the checksum is wrong after this.
This change fixes the remaining functions.
Change-Id: I3f52d074df29fc29ae1d940b3dcec3aa2cfc96a5
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/342
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/northbridge/intel/e7505/northbridge.c')
0 files changed, 0 insertions, 0 deletions