northbridge: Drop print_ implementation from non-romcc boards

Because we had no stack on romcc boards, we had a separate, not as
powerful clone of printk: print_*. Back in the day, like more than
half a decade ago, we migrated a lot of boards to printk, but we never
cleaned up the existing code to be consistent. instead, we worked around
the problem with a very messy console.h (nowadays the mess is hidden in
romstage_console.c and early_print.h)
This patch cleans up the northbridge code to use printk() on all non-ROMCC
boards.

Change-Id: I4a36cd965c58aae65d74ce1e697dc0d0f58f47a1
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/7856
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)

2 files changed, 27 insertions, 126 deletions

diff --git a/src/northbridge/intel/e7501/debug.c b/src/northbridge/intel/e7501/debug.c
index 07f15968e5..32a14289fb 100644
--- a/src/northbridge/intel/e7501/debug.c
+++ b/src/northbridge/intel/e7501/debug.c
@@ -5,12 +5,8 @@
 #if 1
 static void print_debug_pci_dev(unsigned dev)
 {
-	print_debug("PCI: ");
-	print_debug_hex8((dev >> 16) & 0xff);
-	print_debug_char(':');
-	print_debug_hex8((dev >> 11) & 0x1f);
-	print_debug_char('.');
-	print_debug_hex8((dev >> 8) & 7);
+	printk(BIOS_DEBUG, "PCI: %02x:%02x.%x",
+		(dev >> 16) & 0xff, (dev >> 11) & 0x1f, (dev >> 8) & 7);
 }
 
 static inline void print_pci_devices(void)
@@ -27,7 +23,7 @@ static inline void print_pci_devices(void)
 			continue;
 		}
 		print_debug_pci_dev(dev);
-		print_debug("\n");
+		printk(BIOS_DEBUG, "\n");
 	}
 }
 
@@ -38,24 +34,12 @@ static void dump_pci_device(unsigned dev)
 
 	for(i = 0; i < 256; i++) {
 		unsigned char val;
-		if ((i & 0x0f) == 0) {
-#if !defined(__ROMCC__)
+		if ((i & 0x0f) == 0)
                         printk(BIOS_DEBUG, "\n%02x:",i);
-#else
-			print_debug("\n");
-			print_debug_hex8(i);
-			print_debug_char(':');
-#endif
-		}
 		val = pci_read_config8(dev, i);
-#if !defined(__ROMCC__)
 		printk(BIOS_DEBUG, " %02x", val);
-#else
-		print_debug_char(' ');
-		print_debug_hex8(val);
-#endif
 	}
-	print_debug("\n");
+	printk(BIOS_DEBUG, "\n");
 }
 
 static inline void dump_pci_devices(void)
@@ -95,98 +79,55 @@ static inline void dump_pci_devices_on_bus(unsigned busn)
 static inline void dump_spd_registers(const struct mem_controller *ctrl)
 {
 	int i;
-	print_debug("\n");
+	printk(BIOS_DEBUG, "\n");
 	for(i = 0; i < 4; i++) {
 		unsigned device;
 		device = ctrl->channel0[i];
 		if (device) {
 			int j;
-#if !defined(__ROMCC__)
 			printk(BIOS_DEBUG, "dimm: %02x.0: %02x", i, device);
-#else
-			print_debug("dimm: ");
-			print_debug_hex8(i);
-			print_debug(".0: ");
-			print_debug_hex8(device);
-#endif
 			for(j = 0; j < 128; j++) {
 				int status;
 				unsigned char byte;
-				if ((j & 0xf) == 0) {
-#if !defined(__ROMCC__)
+				if ((j & 0xf) == 0)
 					printk(BIOS_DEBUG, "\n%02x: ", j);
-#else
-					print_debug("\n");
-					print_debug_hex8(j);
-					print_debug(": ");
-#endif
-				}
 				status = smbus_read_byte(device, j);
 				if (status < 0) {
 					break;
 				}
 				byte = status & 0xff;
-#if !defined(__ROMCC__)
 				printk(BIOS_DEBUG, "%02x ", byte);
-#else
-				print_debug_hex8(byte);
-				print_debug_char(' ');
-#endif
 			}
-			print_debug("\n");
+			printk(BIOS_DEBUG, "\n");
 		}
 		device = ctrl->channel1[i];
 		if (device) {
 			int j;
-#if !defined(__ROMCC__)
                         printk(BIOS_DEBUG, "dimm: %02x.1: %02x", i, device);
-#else
-			print_debug("dimm: ");
-			print_debug_hex8(i);
-			print_debug(".1: ");
-			print_debug_hex8(device);
-#endif
 			for(j = 0; j < 128; j++) {
 				int status;
 				unsigned char byte;
-				if ((j & 0xf) == 0) {
-#if !defined(__ROMCC__)
+				if ((j & 0xf) == 0)
                                         printk(BIOS_DEBUG, "\n%02x: ", j);
-#else
-					print_debug("\n");
-					print_debug_hex8(j);
-					print_debug(": ");
-#endif
-				}
 				status = smbus_read_byte(device, j);
 				if (status < 0) {
 					break;
 				}
 				byte = status & 0xff;
-#if !defined(__ROMCC__)
                                 printk(BIOS_DEBUG, "%02x ", byte);
-#else
-				print_debug_hex8(byte);
-				print_debug_char(' ');
-#endif
 			}
-			print_debug("\n");
+			printk(BIOS_DEBUG, "\n");
 		}
 	}
 }
 static inline void dump_smbus_registers(void)
 {
 	unsigned device;
-        print_debug("\n");
+        printk(BIOS_DEBUG, "\n");
         for(device = 1; device < 0x80; device++) {
                 int j;
 		if( smbus_read_byte(device, 0) < 0 ) continue;
-#if !defined(__ROMCC__)
 		printk(BIOS_DEBUG, "smbus: %02x", device);
-#else
-                print_debug("smbus: ");
-                print_debug_hex8(device);
-#endif
                 for(j = 0; j < 256; j++) {
                 	int status;
                         unsigned char byte;
@@ -194,24 +135,12 @@ static inline void dump_smbus_registers(void)
                         if (status < 0) {
 				break;
                         }
-                        if ((j & 0xf) == 0) {
-#if !defined(__ROMCC__)
+                        if ((j & 0xf) == 0)
 				printk(BIOS_DEBUG, "\n%02x: ",j);
-#else
-                	        print_debug("\n");
-                                print_debug_hex8(j);
-                                print_debug(": ");
-#endif
-                        }
                         byte = status & 0xff;
-#if !defined(__ROMCC__)
                         printk(BIOS_DEBUG, "%02x ", byte);
-#else
-                        print_debug_hex8(byte);
-                        print_debug_char(' ');
-#endif
                 }
-                print_debug("\n");
+                printk(BIOS_DEBUG, "\n");
 	}
 }
 
@@ -219,31 +148,15 @@ static inline void dump_io_resources(unsigned port)
 {
 
 	int i;
-#if !defined(__ROMCC__)
 	printk(BIOS_DEBUG, "%04x:\n", port);
-#else
-        print_debug_hex16(port);
-        print_debug(":\n");
-#endif
         for(i=0;i<256;i++) {
                 uint8_t val;
-                if ((i & 0x0f) == 0) {
-#if !defined(__ROMCC__)
+                if ((i & 0x0f) == 0)
 			printk(BIOS_DEBUG, "%02x:", i);
-#else
-                        print_debug_hex8(i);
-                        print_debug_char(':');
-#endif
-                }
                 val = inb(port);
-#if !defined(__ROMCC__)
 		printk(BIOS_DEBUG, " %02x",val);
-#else
-                print_debug_char(' ');
-                print_debug_hex8(val);
-#endif
                 if ((i & 0x0f) == 0x0f) {
-                        print_debug("\n");
+                        printk(BIOS_DEBUG, "\n");
                 }
 		port++;
         }
@@ -252,24 +165,12 @@ static inline void dump_io_resources(unsigned port)
 static inline void dump_mem(unsigned start, unsigned end)
 {
         unsigned i;
-	print_debug("dump_mem:");
+	printk(BIOS_DEBUG, "dump_mem:");
         for(i=start;i<end;i++) {
-		if((i & 0xf)==0) {
-#if !defined(__ROMCC__)
+		if((i & 0xf)==0)
 			printk(BIOS_DEBUG, "\n%08x:", i);
-#else
-			print_debug("\n");
-			print_debug_hex32(i);
-			print_debug(":");
-#endif
-		}
-#if !defined(__ROMCC__)
 		printk(BIOS_DEBUG, " %02x", (unsigned char)*((unsigned char *)i));
-#else
-		print_debug(" ");
-             	print_debug_hex8((unsigned char)*((unsigned char *)i));
-#endif
         }
-        print_debug("\n");
+        printk(BIOS_DEBUG, "\n");
  }
 #endif
diff --git a/src/northbridge/intel/e7501/raminit.c b/src/northbridge/intel/e7501/raminit.c
index 2247a256af..22d1bbc7ab 100644
--- a/src/northbridge/intel/e7501/raminit.c
+++ b/src/northbridge/intel/e7501/raminit.c
@@ -27,9 +27,9 @@ Definitions:
 //#define VALIDATE_DIMM_COMPATIBILITY
 
 #if CONFIG_DEBUG_RAM_SETUP
-#define RAM_DEBUG_MESSAGE(x)	print_debug(x)
-#define RAM_DEBUG_HEX32(x)	print_debug_hex32(x)
-#define RAM_DEBUG_HEX8(x)	print_debug_hex8(x)
+#define RAM_DEBUG_MESSAGE(x)	printk(BIOS_DEBUG, x)
+#define RAM_DEBUG_HEX32(x)	printk(BIOS_DEBUG, "%08x", x)
+#define RAM_DEBUG_HEX8(x)	printk(BIOS_DEBUG, "%02x", x)
 #define DUMPNORTH()		dump_pci_device(PCI_DEV(0, 0, 0))
 #else
 #define RAM_DEBUG_MESSAGE(x)
@@ -784,7 +784,7 @@ static uint8_t spd_get_supported_dimms(const struct mem_controller *ctrl)
 		    spd_read_byte(channel1_dimm, SPD_MODULE_ATTRIBUTES);
 		if (!(spd_value & MODULE_REGISTERED) || (spd_value < 0)) {
 
-			print_debug("Skipping un-matched DIMMs - only dual-channel operation supported\n");
+			printk(BIOS_DEBUG, "Skipping un-matched DIMMs - only dual-channel operation supported\n");
 			continue;
 		}
 #ifdef VALIDATE_DIMM_COMPATIBILITY
@@ -812,11 +812,11 @@ static uint8_t spd_get_supported_dimms(const struct mem_controller *ctrl)
 			// Made it through all the checks, this DIMM pair is usable
 			dimm_mask |= ((1 << i) | (1 << (MAX_DIMM_SOCKETS_PER_CHANNEL + i)));
 		} else
-			print_debug("Skipping un-matched DIMMs - only dual-channel operation supported\n");
+			printk(BIOS_DEBUG, "Skipping un-matched DIMMs - only dual-channel operation supported\n");
 #else
 		switch (bDualChannel) {
 		case 0:
-			print_debug("Skipping un-matched DIMMs - only dual-channel operation supported\n");
+			printk(BIOS_DEBUG, "Skipping un-matched DIMMs - only dual-channel operation supported\n");
 			break;
 
 		default:
@@ -1523,13 +1523,13 @@ static void configure_e7501_dram_controller_mode(const struct
 		die_on_spd_error(value);
 		value &= 0x7f;	// Mask off self-refresh bit
 		if (value > MAX_SPD_REFRESH_RATE) {
-			print_err("unsupported refresh rate\n");
+			printk(BIOS_ERR, "unsupported refresh rate\n");
 			continue;
 		}
 		// Get the appropriate E7501 refresh mode for this DIMM
 		dimm_refresh_mode = refresh_rate_map[value];
 		if (dimm_refresh_mode > 7) {
-			print_err("unsupported refresh rate\n");
+			printk(BIOS_ERR, "unsupported refresh rate\n");
 			continue;
 		}
 		// If this DIMM requires more frequent refresh than others,
@@ -1961,7 +1961,7 @@ static void sdram_set_spd_registers(const struct mem_controller *ctrl)
 	dimm_mask = spd_get_supported_dimms(ctrl);
 
 	if (dimm_mask == 0) {
-		print_debug("No usable memory for this controller\n");
+		printk(BIOS_DEBUG, "No usable memory for this controller\n");
 	} else {
 		enable_e7501_clocks(dimm_mask);