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authorIdwer Vollering <vidwer@gmail.com>2013-12-22 21:38:18 +0000
committerAlexandru Gagniuc <mr.nuke.me@gmail.com>2013-12-23 02:12:51 +0100
commitd26da9c8f0794f473f476a69821abffb52996237 (patch)
tree210ccdfcf6b24b7bc6971aaec964878338c5d2dc /src/northbridge/amd
parentc6c8cb7f799f81a55b94c1e64ee13773dfc7f631 (diff)
Coding style: punctuation cleanup [1/2].
Clean up superfluous line terminators. Change-Id: If837b4f1b3e7702cbb09ba12f53ed788a8f31386 Signed-off-by: Idwer Vollering <vidwer@gmail.com> Reviewed-on: http://review.coreboot.org/4562 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/northbridge/amd')
-rw-r--r--src/northbridge/amd/amdmct/wrappers/mcti_d.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/amd/amdmct/wrappers/mcti_d.c b/src/northbridge/amd/amdmct/wrappers/mcti_d.c
index d6860b2116..8c453321bb 100644
--- a/src/northbridge/amd/amdmct/wrappers/mcti_d.c
+++ b/src/northbridge/amd/amdmct/wrappers/mcti_d.c
@@ -48,7 +48,7 @@ static u16 mctGet_NVbits(u8 index)
//val = 200; /* 200MHz(DDR400) */
//val = 266; /* 266MHz(DDR533) */
//val = 333; /* 333MHz(DDR667) */
- val = MEM_MAX_LOAD_FREQ;; /* 400MHz(DDR800) */
+ val = MEM_MAX_LOAD_FREQ; /* 400MHz(DDR800) */
break;
case NV_ECC_CAP:
#if SYSTEM_TYPE == SERVER