amd/common/acpi: move thermal zone to common location

Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I048d1906bc474be4d5a4e44b9c7ae28f53b49d5a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39779
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

6 files changed, 5 insertions, 98 deletions

diff --git a/src/northbridge/amd/agesa/family14/acpi/northbridge.asl b/src/northbridge/amd/agesa/family14/acpi/northbridge.asl
index 72efeca1cf..6f51ea1f7a 100644
--- a/src/northbridge/amd/agesa/family14/acpi/northbridge.asl
+++ b/src/northbridge/amd/agesa/family14/acpi/northbridge.asl
@@ -124,7 +124,6 @@ Device(PE23) {
 /* Northbridge function 3 */
 Device(NBF3) {
 	Name(_ADR, 0x00180003)
-
 	/* k10temp thermal zone */
-	#include "thermal_mixin.asl"
+	#include <soc/amd/common/acpi/thermal_zone.asl>
 } /* end NBF3 */
diff --git a/src/northbridge/amd/agesa/family14/acpi/thermal_mixin.asl b/src/northbridge/amd/agesa/family14/acpi/thermal_mixin.asl
deleted file mode 100644
index 3c692ce859..0000000000
--- a/src/northbridge/amd/agesa/family14/acpi/thermal_mixin.asl
+++ /dev/null
@@ -1,92 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-/*
- * Include this file into a mainboard DSDT inside the PCI device
- * "Northbridge Miscellaneous Control (Northbridge function 3)" and it
- * will expose the temperature sensor of the processor as a thermal
- * zone.
- *
- * Families 10 through 14 and some family 15 CPUs are supported.
- *
- * If, for example, the NB Misc. Control device is on 0:18.3, include
- * the following:
- *
- * Scope (\_SB.PCI0) {
- *   Device (K10M) {
- *     Name (_ADR, 0x00180003)
- *     #include <northbridge/amd/agesa/family14/acpi/thermal_mixin.asl>
- *   }
- * }
- *
- * Do not include this if the board is affected by erratum 319 as the
- * thermal sensor of Socket F/AM2+ processors may be unreliable.
- * (Erratum 319 affects AM2+ boards, AM3 and later should be fine)
- */
-
-#ifndef K10TEMP_HOT_OFFSET
-# define K10TEMP_HOT_OFFSET	50
-#endif
-
-#define K10TEMP_KELVIN_OFFSET	2732
-#define K10TEMP_TLIMIT_OFFSET	520
-
-OperationRegion (TCFG, PCI_Config, 0x64, 0x4)
-Field (TCFG, ByteAcc, NoLock, Preserve) {
-	HTCE, 1, /* Hardware thermal control enable */
-	, 15,
-	TLMT, 7, /* (LimitTmp - 52) / 0.5 */
-	, 9,
-}
-
-OperationRegion (TCTL, PCI_Config, 0xa4, 0x4)
-Field (TCTL, ByteAcc, NoLock, Preserve) {
-	, 21,
-	TNOW, 11, /* CurTmp / 0.125 */
-}
-
-ThermalZone (TZ00) {
-	Name (_STR, Unicode ("AMD CPU Core Thermal Sensor"))
-
-	Method (_STA) {
-		If (LEqual (HTCE, One)) {
-			Return (0x0F)
-		}
-		Return (Zero)
-	}
-
-	Method (_TMP) {	/* Current temp in tenths degree Kelvin. */
-		Multiply (TNOW, 10, Local0)
-		ShiftRight (Local0, 3, Local0)
-		Return (Add (Local0, K10TEMP_KELVIN_OFFSET))
-	}
-
-	/*
-	 * TLMT indicates threshold where HTC become active. That is the processor will limit
-	 * P-State and power consumption in order to cool down.
-	 */
-	Method (_PSV) {	/* Passive temp in tenths degree Kelvin. */
-		Multiply (TLMT, 10, Local0)
-		ShiftRight (Local0, 1, Local0)
-		Add (Local0, K10TEMP_TLIMIT_OFFSET, Local0)
-		Return (Add (Local0, K10TEMP_KELVIN_OFFSET))
-	}
-
-	Method (_HOT) {	/* Hot temp in tenths degree Kelvin. */
-		Return (Add (_PSV, K10TEMP_HOT_OFFSET))
-	}
-
-	Method (_CRT) {	/* Critical temp in tenths degree Kelvin. */
-		Return (Add (_HOT, K10TEMP_HOT_OFFSET))
-	}
-}
diff --git a/src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl b/src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl
index 40df8918b1..217132f8e4 100644
--- a/src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl
+++ b/src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl
@@ -95,5 +95,5 @@ Device(PBR7) {
 
 Device(K10M) {
 	Name (_ADR, 0x00180003)
-	#include <northbridge/amd/agesa/family14/acpi/thermal_mixin.asl>
+	#include <soc/amd/common/acpi/thermal_zone.asl>
 }
diff --git a/src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl b/src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl
index 34bf33a32e..34e8ef046d 100644
--- a/src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl
+++ b/src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl
@@ -95,5 +95,5 @@ Device(PBR8) {
 
 Device(K10M) {
 	Name (_ADR, 0x00180003)
-	#include <northbridge/amd/agesa/family14/acpi/thermal_mixin.asl>
+	#include <soc/amd/common/acpi/thermal_zone.asl>
 }
diff --git a/src/northbridge/amd/pi/00630F01/acpi/northbridge.asl b/src/northbridge/amd/pi/00630F01/acpi/northbridge.asl
index cdb4063d36..ed5db82e79 100644
--- a/src/northbridge/amd/pi/00630F01/acpi/northbridge.asl
+++ b/src/northbridge/amd/pi/00630F01/acpi/northbridge.asl
@@ -65,5 +65,5 @@ Device(PBR3) {
 
 Device(K10M) {
 	Name (_ADR, 0x00180003)
-	#include <northbridge/amd/agesa/family14/acpi/thermal_mixin.asl>
+	#include <soc/amd/common/acpi/thermal_zone.asl>
 }
diff --git a/src/northbridge/amd/pi/00730F01/acpi/northbridge.asl b/src/northbridge/amd/pi/00730F01/acpi/northbridge.asl
index 34bf33a32e..34e8ef046d 100644
--- a/src/northbridge/amd/pi/00730F01/acpi/northbridge.asl
+++ b/src/northbridge/amd/pi/00730F01/acpi/northbridge.asl
@@ -95,5 +95,5 @@ Device(PBR8) {
 
 Device(K10M) {
 	Name (_ADR, 0x00180003)
-	#include <northbridge/amd/agesa/family14/acpi/thermal_mixin.asl>
+	#include <soc/amd/common/acpi/thermal_zone.asl>
 }