diff options
author | Stefan Reinauer <stepan@coresystems.de> | 2010-04-15 23:01:59 +0000 |
---|---|---|
committer | Stefan Reinauer <stepan@openbios.org> | 2010-04-15 23:01:59 +0000 |
commit | e46c1c85c90b6d263f951ab745a9fadd93041111 (patch) | |
tree | 4ffefdc0767139b66c48732d44b8a3222eb6b09f /src/northbridge/amd | |
parent | c24d383c15f6d31cd1dd5fb8e090db0561421599 (diff) |
remove more warnings. move ROOT_COMPLEX selection to fam10
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5447 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/amd')
-rw-r--r-- | src/northbridge/amd/amdfam10/Kconfig | 1 | ||||
-rw-r--r-- | src/northbridge/amd/amdfam10/amdfam10_conf.c | 12 | ||||
-rw-r--r-- | src/northbridge/amd/amdfam10/northbridge.c | 3 | ||||
-rw-r--r-- | src/northbridge/amd/lx/northbridge.c | 2 | ||||
-rw-r--r-- | src/northbridge/amd/lx/northbridge.h | 11 | ||||
-rw-r--r-- | src/northbridge/amd/lx/raminit.h | 4 |
6 files changed, 22 insertions, 11 deletions
diff --git a/src/northbridge/amd/amdfam10/Kconfig b/src/northbridge/amd/amdfam10/Kconfig index 8e72c656fe..dd893f6bf8 100644 --- a/src/northbridge/amd/amdfam10/Kconfig +++ b/src/northbridge/amd/amdfam10/Kconfig @@ -21,6 +21,7 @@ config NORTHBRIDGE_AMD_AMDFAM10 bool select HAVE_HIGH_TABLES select HYPERTRANSPORT_PLUGIN_SUPPORT + select NORTHBRIDGE_AMD_AMDFAM10_ROOT_COMPLEX config AGP_APERTURE_SIZE hex diff --git a/src/northbridge/amd/amdfam10/amdfam10_conf.c b/src/northbridge/amd/amdfam10/amdfam10_conf.c index df578044a6..567790cede 100644 --- a/src/northbridge/amd/amdfam10/amdfam10_conf.c +++ b/src/northbridge/amd/amdfam10/amdfam10_conf.c @@ -152,7 +152,7 @@ static u32 get_DctSelBaseAddr(u32 i) return sel_m; } - +#ifdef UNUSED_CODE static void set_DctSelHiEn(u32 i, u32 val) { device_t dev; @@ -168,6 +168,7 @@ static void set_DctSelHiEn(u32 i, u32 val) pci_write_config32(dev, DRAM_CTRL_SEL_LOW, dcs_lo); } +#endif static u32 get_DctSelHiEn(u32 i) { @@ -200,6 +201,7 @@ static void set_DctSelBaseOffset(u32 i, u32 sel_off_m) } +#ifdef UNUSED_CODE static u32 get_DctSelBaseOffset(u32 i) { device_t dev; @@ -215,6 +217,8 @@ static u32 get_DctSelBaseOffset(u32 i) sel_off_m = dcs_hi>>(20+DCSH_DctSelBaseOffset_47_26_SHIFT-26); return sel_off_m; } +#endif + #if CONFIG_AMDMCT == 0 static u32 get_one_DCT(struct mem_info *meminfo) @@ -231,9 +235,8 @@ static u32 get_one_DCT(struct mem_info *meminfo) return one_DCT; } -#endif #if CONFIG_HW_MEM_HOLE_SIZEK != 0 - +// See that other copy in northbridge.c static u32 hoist_memory(u32 hole_startk, u32 i, u32 one_DCT, u32 nodes) { u32 ii; @@ -313,7 +316,8 @@ static u32 hoist_memory(u32 hole_startk, u32 i, u32 one_DCT, u32 nodes) return carry_over; } -#endif +#endif +#endif // CONFIG_AMDMCT #if CONFIG_EXT_CONF_SUPPORT diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c index ab7be4e9e6..76d85f6c3c 100644 --- a/src/northbridge/amd/amdfam10/northbridge.c +++ b/src/northbridge/amd/amdfam10/northbridge.c @@ -795,7 +795,8 @@ static struct hw_mem_hole_info get_hw_mem_hole_info(void) return mem_hole; } - +// WHY this check? CONFIG_AMDMCT is enabled on all Fam10 boards. +// Does it make sense not to? #if CONFIG_AMDMCT == 0 static void disable_hoist_memory(unsigned long hole_startk, int i) { diff --git a/src/northbridge/amd/lx/northbridge.c b/src/northbridge/amd/lx/northbridge.c index e7136dfdc9..137f7a9d09 100644 --- a/src/northbridge/amd/lx/northbridge.c +++ b/src/northbridge/amd/lx/northbridge.c @@ -77,9 +77,7 @@ extern void graphics_init(void); extern void cpubug(void); extern void chipsetinit(void); -extern uint32_t get_systop(void); -void northbridge_init_early(void); void setup_realmode_idt(void); void do_vsmbios(void); diff --git a/src/northbridge/amd/lx/northbridge.h b/src/northbridge/amd/lx/northbridge.h index 560ab30612..99ea284b65 100644 --- a/src/northbridge/amd/lx/northbridge.h +++ b/src/northbridge/amd/lx/northbridge.h @@ -17,11 +17,16 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#include <cpu/amd/lxdef.h> #ifndef NORTHBRIDGE_AMD_LX_H #define NORTHBRIDGE_AMD_LX_H -extern unsigned int lx_scan_root_bus(device_t root, unsigned int max); +#include <cpu/amd/lxdef.h> + +/* northbridge.c */ +unsigned int lx_scan_root_bus(device_t root, unsigned int max); int sizeram(void); -#endif /* NORTHBRIDGE_AMD_LX_H */ +/* northbridgeinit.c */ +void northbridge_init_early(void); +uint32_t get_systop(void); +#endif diff --git a/src/northbridge/amd/lx/raminit.h b/src/northbridge/amd/lx/raminit.h index 4d6652f83b..b05b0edf5b 100644 --- a/src/northbridge/amd/lx/raminit.h +++ b/src/northbridge/amd/lx/raminit.h @@ -27,4 +27,6 @@ struct mem_controller { uint16_t channel0[DIMM_SOCKETS]; }; -#endif /* RAMINIT_H */ +void sdram_initialize(int controllers, const struct mem_controller *ctrl); + +#endif |