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authorEric Biederman <ebiederm@xmission.com>2004-10-22 02:33:51 +0000
committerEric Biederman <ebiederm@xmission.com>2004-10-22 02:33:51 +0000
commit4f9265fdc6c6609dd801a13415bc7a5378076e78 (patch)
tree30b286a218d9188153cbcef654c2d42c4c340495 /src/northbridge/amd
parent23c3d9321f4fdead52080e9a1a261807d0a3cbc8 (diff)
- kill typo so resources are not mixed up in amdk8/northbridge.c
- Enable resources on the lpc bus. PCI now longer do this by default for their children unless they are bridges. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1703 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/amd')
-rw-r--r--src/northbridge/amd/amdk8/northbridge.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c
index d68ad11ea7..f3f6ba9818 100644
--- a/src/northbridge/amd/amdk8/northbridge.c
+++ b/src/northbridge/amd/amdk8/northbridge.c
@@ -590,7 +590,7 @@ static void pci_domain_set_resources(device_t dev)
struct resource *tmp;
tmp = mem1;
mem1 = mem2;
- mem2 = mem1;
+ mem2 = tmp;
}
/* Now place the memory as high up as it will go */
mem2->base = resource_max(mem2);