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authorKeith Hui <buurin@gmail.com>2010-09-20 23:41:37 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2010-09-20 23:41:37 +0000
commitdf35cdc198d9be8cb5a1c6a39c1adef92f5fd336 (patch)
treece0fdc872927037a738ebd39a252a2df7b06f78a /src/northbridge/amd
parent0865b4d9c06d584cfb43793f710d7dfa58e3275e (diff)
A number of cleanups for 440BX raminit code.
Resolves a number of TODOs items within, and clarified a number of other TODOs. Change register_values[] from long to u8 (byte). For what we are doing this is sufficient and makes it only 1/4 the size. Remove a hard-coding of SDRAMC register that is redundant and now incorrect, now that SDRAMC is conditioned on SDRAMPWR_4DIMM Kconfig and set through register_values[]. This fixes all boards with 3 DIMM slots (e.g. ASUS P2B, A-Trend ATC-6220). RPS registers are now set in runtime code; remove it from register_values[] table. Bring DUMPNORTH() back. The code it refers to is still there. Move #define of NB up so the DUMPNORTH() macro can use it. Signed-off-by: Keith Hui <buurin@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5820 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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