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authorStefan Reinauer <stepan@coresystems.de>2008-08-02 19:17:42 +0000
committerStefan Reinauer <stepan@openbios.org>2008-08-02 19:17:42 +0000
commit87c938f139b14a2e0b7fbfa6476c3caaa953e968 (patch)
treeee38c0a23ce57b13cb7ab5a9a4c64a8a8de2e9f4 /src/northbridge/amd
parent685240610b22f8e5f82204e526c6b8a8d6657173 (diff)
adapt Uncompressing.. patch for AMD code. Also replace "linxbios" by "coreboot"
in a number of places. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3466 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/amd')
-rw-r--r--src/northbridge/amd/amdk8/get_sblk_pci1234.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/amd/amdk8/get_sblk_pci1234.c b/src/northbridge/amd/amdk8/get_sblk_pci1234.c
index fbc08ea18a..7b9b757e61 100644
--- a/src/northbridge/amd/amdk8/get_sblk_pci1234.c
+++ b/src/northbridge/amd/amdk8/get_sblk_pci1234.c
@@ -92,7 +92,7 @@ unsigned node_link_to_bus(unsigned node, unsigned link)
* pci1234[0] will record the south bridge link and bus range
* pci1234[i] will record HT chain i.
*
- * For example, on the Tyan S2885 linxbios_ram will put the AMD8151 chain (HT
+ * For example, on the Tyan S2885 coreboot_ram will put the AMD8151 chain (HT
* link 0) into the register 0xE0, and the AMD8131/8111 HT chain into the
* register 0xE4.
*