diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2012-07-11 08:02:39 +0300 |
|---|---|---|
| committer | Patrick Georgi <patrick@georgi-clan.de> | 2012-07-16 18:45:09 +0200 |
| commit | 55fff930ce01aff16dfd24cf0d446a3a181dd6f7 (patch) | |
| tree | 9dab582083278a10d2141e0f9a73402340ae38c8 /src/northbridge/amd | |
| parent | d4821fc702767626cbf58940d4a08f6688b354a4 (diff) | |
Move setup_uma_memory() to Agesa Family14 northbridge
Following boards had identical code:
amd/inagua
amd/persimmon
The following had only whitespace or debug level changes
compared to ones above.
amd/union_station
amd/south_station
asrock/e350m1
Change-Id: I11ee46e06e1dd510cba551166189ebcaa144464b
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/1208
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/northbridge/amd')
| -rw-r--r-- | src/northbridge/amd/agesa/family14/northbridge.c | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c index 021a1db2bf..dbc432a3ea 100644 --- a/src/northbridge/amd/agesa/family14/northbridge.c +++ b/src/northbridge/amd/agesa/family14/northbridge.c @@ -31,6 +31,7 @@ #include <cbmem.h> #include <cpu/x86/lapic.h> +#include <cpu/amd/mtrr.h> #include "agesawrapper.h" #include "chip.h" @@ -516,6 +517,48 @@ static void domain_read_resources(device_t dev) #endif } +void setup_uma_memory(void) +{ +#if CONFIG_GFXUMA + msr_t msr, msr2; + uint32_t sys_mem; + + /* TOP_MEM: the top of DRAM below 4G */ + msr = rdmsr(TOP_MEM); + printk + (BIOS_INFO, "%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n", + __func__, msr.lo, msr.hi); + + /* TOP_MEM2: the top of DRAM above 4G */ + msr2 = rdmsr(TOP_MEM2); + printk + (BIOS_INFO, "%s, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n", + __func__, msr2.lo, msr2.hi); + + /* refer to UMA Size Consideration in Family14h BKDG. */ + sys_mem = msr.lo + 0x1000000; // Ignore 16MB allocated for C6 when finding UMA size, refer MemNGetUmaSizeON() + if ((msr.hi & 0x0000000F) || (sys_mem >= 0x80000000)) { + uma_memory_size = 0x18000000; /* >= 2G memory, 384M recommended UMA */ + } + else { + if (sys_mem >= 0x40000000) { + uma_memory_size = 0x10000000; /* >= 1G memory, 256M recommended UMA */ + } else { + uma_memory_size = 0x4000000; /* <1G memory, 64M recommended UMA */ + } + } + + uma_memory_base = msr.lo - uma_memory_size; /* TOP_MEM1 */ + printk(BIOS_INFO, "%s: uma size 0x%08llx, memory start 0x%08llx\n", + __func__, uma_memory_size, uma_memory_base); + + /* TODO: TOP_MEM2 */ +#else + uma_memory_size = 0x10000000; /* 256M recommended UMA */ + uma_memory_base = 0x30000000; /* 1GB system memory supported */ +#endif +} + static void domain_set_resources(device_t dev) { printk(BIOS_DEBUG, "\nFam14h - domain_set_resources.\n"); |