Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-51

Creator:  Yinghai Lu <yhlu@tyan.com>

cache_as_ram for AMD and some intel


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1967 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

5 files changed, 113 insertions, 9 deletions

diff --git a/src/northbridge/amd/amdk8/coherent_ht.c b/src/northbridge/amd/amdk8/coherent_ht.c
index ca7791cf63..d7be557d37 100644
--- a/src/northbridge/amd/amdk8/coherent_ht.c
+++ b/src/northbridge/amd/amdk8/coherent_ht.c
@@ -107,9 +107,13 @@ typedef uint32_t u32;
 
 static inline void print_linkn (const char *strval, uint8_t byteval) 
 {
-#if 0
+#if 1
+#if CONFIG_USE_INIT
+	printk_debug("%s%02x\r\n", strval, byteval); 
+#else
 	print_debug(strval); print_debug_hex8(byteval); print_debug("\r\n");
 #endif
+#endif
 }
 
 static void disable_probes(void)
@@ -1556,8 +1560,12 @@ static struct setup_smp_result setup_smp(void)
 		result = setup_smp8(result.needs_reset);
 #endif
 
+#if CONFIG_USE_INIT
+	printk_debug("%02x nodes initialized.\r\n", result.nodes);
+#else
 	print_debug_hex8(result.nodes);
 	print_debug(" nodes initialized.\r\n");
+#endif
 	
 	return result;
 
diff --git a/src/northbridge/amd/amdk8/debug.c b/src/northbridge/amd/amdk8/debug.c
index eeba1e1e2c..861ad8c38a 100644
--- a/src/northbridge/amd/amdk8/debug.c
+++ b/src/northbridge/amd/amdk8/debug.c
@@ -35,21 +35,27 @@ static void dump_pci_device(unsigned dev)
 {
 	int i;
 	print_debug_pci_dev(dev);
-	print_debug("\r\n");
 	
 	for(i = 0; i < 256; i++) {
 		unsigned char val;
 		if ((i & 0x0f) == 0) {
+#if CONFIG_USE_INIT
+                        printk_debug("\r\n%02x:",i);
+#else
+			print_debug("\r\n");
 			print_debug_hex8(i);
 			print_debug_char(':');
+#endif
 		}
 		val = pci_read_config8(dev, i);
+#if CONFIG_USE_INIT
+		printk_debug(" %02x", val);
+#else
 		print_debug_char(' ');
 		print_debug_hex8(val);
-		if ((i & 0x0f) == 0x0f) {
-			print_debug("\r\n");
-		}
+#endif
 	}
+	print_debug("\r\n");
 }
 
 static void dump_pci_devices(void)
@@ -95,50 +101,74 @@ static void dump_spd_registers(const struct mem_controller *ctrl)
 		device = ctrl->channel0[i];
 		if (device) {
 			int j;
+#if CONFIG_USE_INIT
+			printk_debug("dimm: %02x.0: %02x", i, device);
+#else
 			print_debug("dimm: "); 
 			print_debug_hex8(i); 
 			print_debug(".0: ");
 			print_debug_hex8(device);
+#endif
 			for(j = 0; j < 128; j++) {
 				int status;
 				unsigned char byte;
 				if ((j & 0xf) == 0) {
+#if CONFIG_USE_INIT
+					printk_debug("\r\n%02x: ", j);
+#else
 					print_debug("\r\n");
 					print_debug_hex8(j);
 					print_debug(": ");
+#endif
 				}
 				status = smbus_read_byte(device, j);
 				if (status < 0) {
 					break;
 				}
 				byte = status & 0xff;
+#if CONFIG_USE_INIT
+				printk_debug("%02x ", byte);
+#else
 				print_debug_hex8(byte);
 				print_debug_char(' ');
+#endif
 			}
 			print_debug("\r\n");
 		}
 		device = ctrl->channel1[i];
 		if (device) {
 			int j;
+#if CONFIG_USE_INIT
+                        printk_debug("dimm: %02x.1: %02x", i, device);
+#else
 			print_debug("dimm: "); 
 			print_debug_hex8(i); 
 			print_debug(".1: ");
 			print_debug_hex8(device);
+#endif
 			for(j = 0; j < 128; j++) {
 				int status;
 				unsigned char byte;
 				if ((j & 0xf) == 0) {
+#if CONFIG_USE_INIT
+                                        printk_debug("\r\n%02x: ", j);
+#else
 					print_debug("\r\n");
 					print_debug_hex8(j);
 					print_debug(": ");
+#endif
 				}
 				status = smbus_read_byte(device, j);
 				if (status < 0) {
 					break;
 				}
 				byte = status & 0xff;
+#if CONFIG_USE_INIT
+                                printk_debug("%02x ", byte);
+#else
 				print_debug_hex8(byte);
 				print_debug_char(' ');
+#endif
 			}
 			print_debug("\r\n");
 		}
@@ -151,8 +181,12 @@ static void dump_smbus_registers(void)
         for(device = 1; device < 0x80; device++) {
                 int j;
 		if( smbus_read_byte(device, 0) < 0 ) continue;
+#if CONFIG_USE_INIT
+		printk_debug("smbus: %02x", device);
+#else
                 print_debug("smbus: ");
                 print_debug_hex8(device);
+#endif
                 for(j = 0; j < 256; j++) {
                 	int status; 
                         unsigned char byte;
@@ -161,13 +195,21 @@ static void dump_smbus_registers(void)
 				break;
                         }
                         if ((j & 0xf) == 0) {
+#if CONFIG_USE_INIT
+				printk_debug("\r\n%02x: ",j);
+#else
                 	        print_debug("\r\n");
                                 print_debug_hex8(j);
                                 print_debug(": ");
+#endif
                         }
                         byte = status & 0xff;
+#if CONFIG_USE_INIT
+                        printk_debug("%02x ", byte);
+#else
                         print_debug_hex8(byte);
                         print_debug_char(' ');
+#endif
                 }
                 print_debug("\r\n");
 	}	
@@ -178,21 +220,57 @@ static void dump_io_resources(unsigned port)
 
 	int i;
         udelay(2000);
+#if CONFIG_USE_INIT
+	printk_debug("%04x:\r\n", port);
+#else
         print_debug_hex16(port);
         print_debug(":\r\n");
+#endif
         for(i=0;i<256;i++) {
                 uint8_t val;
                 if ((i & 0x0f) == 0) {
+#if CONFIG_USE_INIT
+			printk_debug("%02x:", i);
+#else
                         print_debug_hex8(i);
                         print_debug_char(':');
+#endif
                 }
                 val = inb(port);
+#if CONFIG_USE_INIT
+		printk_debug(" %02x",val);
+#else
                 print_debug_char(' ');
                 print_debug_hex8(val);
+#endif
                 if ((i & 0x0f) == 0x0f) {
                         print_debug("\r\n");
                 }
 		port++;
         }
 }
+
+static void dump_mem(unsigned start, unsigned end)
+{
+        unsigned i;
+	print_debug("dump_mem:");
+        for(i=start;i<end;i++) {
+		if((i & 0xf)==0) {
+#if CONFIG_USE_INIT
+			printk_debug("\r\n%08x:", i);
+#else	
+			print_debug("\r\n");
+			print_debug_hex32(i);
+			print_debug(":");
+#endif
+		}
+#if CONFIG_USE_INIT	
+		printk_debug(" %02x", (unsigned char)*((unsigned char *)i));
+#else
+		print_debug(" ");
+             	print_debug_hex8((unsigned char)*((unsigned char *)i));
+#endif
+        }
+        print_debug("\r\n");
+ }
 #endif
diff --git a/src/northbridge/amd/amdk8/incoherent_ht.c b/src/northbridge/amd/amdk8/incoherent_ht.c
index ec767456e8..7bb315d687 100644
--- a/src/northbridge/amd/amdk8/incoherent_ht.c
+++ b/src/northbridge/amd/amdk8/incoherent_ht.c
@@ -12,9 +12,13 @@
 
 static inline void print_linkn_in (const char *strval, uint8_t byteval)
 {
-#if 0
+#if 1
+#if CONFIG_USE_INIT
+        printk_debug("%s%02x\r\n", strval, byteval); 
+#else
         print_debug(strval); print_debug_hex8(byteval); print_debug("\r\n");
 #endif
+#endif
 }
 
 static uint8_t ht_lookup_slave_capability(device_t dev)
diff --git a/src/northbridge/amd/amdk8/raminit.c b/src/northbridge/amd/amdk8/raminit.c
index 3bdf8c3b11..e34c93d5c7 100644
--- a/src/northbridge/amd/amdk8/raminit.c
+++ b/src/northbridge/amd/amdk8/raminit.c
@@ -31,10 +31,14 @@ static void setup_resource_map(const unsigned int *register_values, int max)
 		unsigned where;
 		unsigned long reg;
 #if 0
+	#if CONFIG_USE_INIT
+		prink_debug("%08x <- %08x\r\n", register_values[i], register_values[i+2]);
+	#else
 		print_debug_hex32(register_values[i]);
 		print_debug(" <-");
 		print_debug_hex32(register_values[i+2]);
 		print_debug("\r\n");
+	#endif
 #endif
 		dev = register_values[i] & ~0xff;
 		where = register_values[i] & 0xff;
@@ -538,10 +542,14 @@ static void sdram_set_registers(const struct mem_controller *ctrl)
 		unsigned where;
 		unsigned long reg;
 #if 0
+        #if CONFIG_USE_INIT
+                prink_debug("%08x <- %08x\r\n", register_values[i], register_values[i+2]);
+        #else
 		print_spew_hex32(register_values[i]);
 		print_spew(" <-");
 		print_spew_hex32(register_values[i+2]);
 		print_spew("\r\n");
+	#endif
 #endif
 		dev = (register_values[i] & ~0xff) - PCI_DEV(0, 0x18, 0) + ctrl->f0;
 		where = register_values[i] & 0xff;
@@ -1553,7 +1561,7 @@ static struct spd_set_memclk_result spd_set_memclk(const struct mem_controller *
 	/* Update DRAM Config High with our selected memory speed */
 	value = pci_read_config32(ctrl->f2, DRAM_CONFIG_HIGH);
 	value &= ~(DCH_MEMCLK_MASK << DCH_MEMCLK_SHIFT);
-#if 1
+#if 0
 	/* Improves DQS centering by correcting for case when core speed multiplier and MEMCLK speed result in odd clock divisor, by selecting the next lowest memory speed, required only at DDR400 and higher speeds with certain DIMM loadings ---- cheating???*/
 	if(!is_cpu_pre_e0()) {
 		if(min_cycle_time==0x50) {
@@ -2291,7 +2299,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
 		print_debug(" done\r\n");
 	}
 
-	//FIXME add enable node interleaving here --yhlu
+	//FIXME add enable node interleaving here -- yhlu
 	/*needed?
 		1. check how many nodes we have , if not all has ram installed get out
 		2. check cs_base lo is 0, node 0 f2 0x40,,,,, if any one is not using lo is CS_BASE, get out
@@ -2300,7 +2308,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
 		5. for node interleaving we need to set mem hole to every node ( need recalcute hole offset in f0 for every node)
 	*/
 
-
+#if CONFIG_DCACHE_RAM == 0
 	/* Make certain the first 1M of memory is intialized */
 	print_debug("Clearing initial memory region: ");
 
@@ -2314,4 +2322,5 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
 	cache_lbmem(MTRR_TYPE_WRBACK);
 	
 	print_debug(" done\r\n");
+#endif
 }
diff --git a/src/northbridge/amd/amdk8/setup_resource_map.c b/src/northbridge/amd/amdk8/setup_resource_map.c
index 74bbfdf646..ebd1978a7c 100644
--- a/src/northbridge/amd/amdk8/setup_resource_map.c
+++ b/src/northbridge/amd/amdk8/setup_resource_map.c
@@ -19,6 +19,10 @@ static void setup_resource_map_x(const unsigned int *register_values, int max)
 #endif
 	for(i = 0; i < max; i += 4) {
 #if RES_DEBUG
+	#if CONFIG_USE_INIT
+                printk_debug("%04x: %02x %08x <- & %08x | %08x\r\n", 
+			i/4, register_values[i],register_values[i+1], register_values[i+2], register_values[i+3]);
+	#else		
                 print_debug_hex16(i/4);
                 print_debug(": ");
                 print_debug_hex8(register_values[i]);
@@ -29,6 +33,7 @@ static void setup_resource_map_x(const unsigned int *register_values, int max)
                 print_debug(" | ");
                 print_debug_hex32(register_values[i+3]);
                 print_debug("\r\n");
+	#endif
 #endif
 		switch (register_values[i]) {
 		case RES_PCI_IO: //PCI