diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2018-05-22 02:18:00 +0300 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2019-01-06 01:17:54 +0000 |
commit | c70eed1e6202c928803f3e7f79161cd247a62b23 (patch) | |
tree | e46a6c87f6f13b7719fd40a9360d8d03359bfffb /src/northbridge/amd | |
parent | 54efaae701dacd58621e66a8cf56812eb5304946 (diff) |
device: Use pcidev_on_root()
Change-Id: Icf34b39d80f6e46d32a39b68f38fb2752c0bcebc
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/26484
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Piotr Król <piotr.krol@3mdeb.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/northbridge/amd')
-rw-r--r-- | src/northbridge/amd/amdfam10/northbridge.c | 24 | ||||
-rw-r--r-- | src/northbridge/amd/amdmct/mct_ddr3/s3utils.c | 14 |
2 files changed, 20 insertions, 18 deletions
diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c index d652746765..c0c6eeb2cd 100644 --- a/src/northbridge/amd/amdfam10/northbridge.c +++ b/src/northbridge/amd/amdfam10/northbridge.c @@ -1459,7 +1459,7 @@ static void cpu_bus_scan(struct device *dev) nb_cfg_54 = read_nb_cfg_54(); #if CONFIG_CBB - dev_mc = dev_find_slot(0, PCI_DEVFN(CONFIG_CDB, 0)); //0x00 + dev_mc = pcidev_on_root(CONFIG_CDB, 0); //0x00 if (dev_mc && dev_mc->bus) { printk(BIOS_DEBUG, "%s found", dev_path(dev_mc)); pci_domain = dev_mc->bus->dev; @@ -1475,7 +1475,7 @@ static void cpu_bus_scan(struct device *dev) } dev_mc = dev_find_slot(CONFIG_CBB, PCI_DEVFN(CONFIG_CDB, 0)); if (!dev_mc) { - dev_mc = dev_find_slot(0, PCI_DEVFN(0x18, 0)); + dev_mc = pcidev_on_root(0x18, 0); if (dev_mc && dev_mc->bus) { printk(BIOS_DEBUG, "%s found\n", dev_path(dev_mc)); pci_domain = dev_mc->bus->dev; @@ -1719,8 +1719,8 @@ static void detect_and_enable_probe_filter(struct device *dev) /* Disable L3 and DRAM scrubbers and configure system for probe filter support */ for (i = 0; i < sysconf.nodes; i++) { - struct device *f2x_dev = dev_find_slot(0, PCI_DEVFN(0x18 + i, 2)); - struct device *f3x_dev = dev_find_slot(0, PCI_DEVFN(0x18 + i, 3)); + struct device *f2x_dev = pcidev_on_root(0x18 + i, 2); + struct device *f3x_dev = pcidev_on_root(0x18 + i, 3); f3x58[i] = pci_read_config32(f3x_dev, 0x58); f3x5c[i] = pci_read_config32(f3x_dev, 0x5c); @@ -1789,7 +1789,7 @@ static void detect_and_enable_probe_filter(struct device *dev) /* Enable probe filter */ for (i = 0; i < sysconf.nodes; i++) { - struct device *f3x_dev = dev_find_slot(0, PCI_DEVFN(0x18 + i, 3)); + struct device *f3x_dev = pcidev_on_root(0x18 + i, 3); dword = pci_read_config32(f3x_dev, 0x1c4); dword |= (0x1 << 31); /* L3TagInit = 1 */ @@ -1810,8 +1810,10 @@ static void detect_and_enable_probe_filter(struct device *dev) /* Enable ATM mode */ for (i = 0; i < sysconf.nodes; i++) { - struct device *f0x_dev = dev_find_slot(0, PCI_DEVFN(0x18 + i, 0)); - struct device *f3x_dev = dev_find_slot(0, PCI_DEVFN(0x18 + i, 3)); + struct device *f0x_dev = + pcidev_on_root(0x18 + i, 0); + struct device *f3x_dev = + pcidev_on_root(0x18 + i, 3); dword = pci_read_config32(f0x_dev, 0x68); dword |= (0x1 << 12); /* ATMModeEn = 1 */ @@ -1827,7 +1829,7 @@ static void detect_and_enable_probe_filter(struct device *dev) /* Reenable L3 and DRAM scrubbers */ for (i = 0; i < sysconf.nodes; i++) { - struct device *f3x_dev = dev_find_slot(0, PCI_DEVFN(0x18 + i, 3)); + struct device *f3x_dev = pcidev_on_root(0x18 + i, 3); pci_write_config32(f3x_dev, 0x58, f3x58[i]); pci_write_config32(f3x_dev, 0x5c, f3x5c[i]); @@ -1863,9 +1865,9 @@ static void detect_and_enable_cache_partitioning(struct device *dev) uint8_t dual_node = 0; for (i = 0; i < sysconf.nodes; i++) { - struct device *f3x_dev = dev_find_slot(0, PCI_DEVFN(0x18 + i, 3)); - struct device *f4x_dev = dev_find_slot(0, PCI_DEVFN(0x18 + i, 4)); - struct device *f5x_dev = dev_find_slot(0, PCI_DEVFN(0x18 + i, 5)); + struct device *f3x_dev = pcidev_on_root(0x18 + i, 3); + struct device *f4x_dev = pcidev_on_root(0x18 + i, 4); + struct device *f5x_dev = pcidev_on_root(0x18 + i, 5); f3xe8 = pci_read_config32(f3x_dev, 0xe8); diff --git a/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c b/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c index c4db5c5f6b..7267f12000 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c @@ -80,7 +80,7 @@ static uint32_t read_config32_dct(struct device *dev, uint8_t node, uint8_t dct, #ifdef __PRE_RAM__ pci_devfn_t dev_fn1 = PCI_DEV(0, 0x18 + node, 1); #else - struct device *dev_fn1 = dev_find_slot(0, PCI_DEVFN(0x18 + node, 1)); + struct device *dev_fn1 = pcidev_on_root(0x18 + node, 1); #endif /* Select DCT */ @@ -109,7 +109,7 @@ static void write_config32_dct(struct device *dev, uint8_t node, uint8_t dct, #ifdef __PRE_RAM__ pci_devfn_t dev_fn1 = PCI_DEV(0, 0x18 + node, 1); #else - struct device *dev_fn1 = dev_find_slot(0, PCI_DEVFN(0x18 + node, 1)); + struct device *dev_fn1 = pcidev_on_root(0x18 + node, 1); #endif /* Select DCT */ @@ -159,7 +159,7 @@ static uint32_t read_amd_dct_index_register_dct(struct device *dev, #ifdef __PRE_RAM__ pci_devfn_t dev_fn1 = PCI_DEV(0, 0x18 + node, 1); #else - struct device *dev_fn1 = dev_find_slot(0, PCI_DEVFN(0x18 + node, 1)); + struct device *dev_fn1 = pcidev_on_root(0x18 + node, 1); #endif /* Select DCT */ @@ -280,7 +280,7 @@ static uint32_t read_config32_dct_nbpstate(struct device *dev, uint8_t node, uint32_t reg) { uint32_t dword; - struct device *dev_fn1 = dev_find_slot(0, PCI_DEVFN(0x18 + node, 1)); + struct device *dev_fn1 = pcidev_on_root(0x18 + node, 1); /* Select DCT */ dword = pci_read_config32(dev_fn1, 0x10c); @@ -343,9 +343,9 @@ void copy_mct_data_to_save_variable(struct amd_s3_persistent_data *persistent_da /* Load data from DCTs into data structure */ for (node = 0; node < MAX_NODES_SUPPORTED; node++) { - struct device *dev_fn1 = dev_find_slot(0, PCI_DEVFN(0x18 + node, 1)); - struct device *dev_fn2 = dev_find_slot(0, PCI_DEVFN(0x18 + node, 2)); - struct device *dev_fn3 = dev_find_slot(0, PCI_DEVFN(0x18 + node, 3)); + struct device *dev_fn1 = pcidev_on_root(0x18 + node, 1); + struct device *dev_fn2 = pcidev_on_root(0x18 + node, 2); + struct device *dev_fn3 = pcidev_on_root(0x18 + node, 3); /* Test for node presence */ if ((!dev_fn1) || (pci_read_config32(dev_fn1, PCI_VENDOR_ID) == 0xffffffff)) { persistent_data->node[node].node_present = 0; |