diff options
| author | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2011-02-10 07:51:51 +0000 |
|---|---|---|
| committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2011-02-10 07:51:51 +0000 |
| commit | 1df854248b60b93aef9e4c37bd6da95371a6d867 (patch) | |
| tree | 97ed6fe5731682f6691c183414ac3c4e0cd6bbf3 /src/northbridge/amd | |
| parent | 31e0deac0e8771a0c98d9463fd7caa101ffb3be1 (diff) | |
Implemented workaround for erratum 169, obsoleting erratum 131.
Workaround for 131 removed.
Changed workaround for erratum 110 to only include pre-revision-F
processors.
For details, check AMD publications:
#25759 (Errata for Fam F pre-revision F processors)
#33610 (Errata for Fam F revision F and later processor)
Based on work and previous patches by:
Rudolf Marek <r.marek@assembler.cz>
Josef Kellermann <seppk@arcor.de>
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Acked-by: Patrick Georgi <patrick.georgi@secunet.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6340 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/amd')
| -rw-r--r-- | src/northbridge/amd/amdk8/coherent_ht.c | 16 |
1 files changed, 15 insertions, 1 deletions
diff --git a/src/northbridge/amd/amdk8/coherent_ht.c b/src/northbridge/amd/amdk8/coherent_ht.c index 30e0471347..12c125c2ab 100644 --- a/src/northbridge/amd/amdk8/coherent_ht.c +++ b/src/northbridge/amd/amdk8/coherent_ht.c @@ -1662,10 +1662,10 @@ static int apply_cpu_errata_fixes(unsigned nodes) unsigned node; int needs_reset = 0; for(node = 0; node < nodes; node++) { -#if CONFIG_K8_REV_F_SUPPORT == 0 device_t dev; uint32_t cmd; dev = NODE_MC(node); +#if CONFIG_K8_REV_F_SUPPORT == 0 if (is_cpu_pre_c0()) { /* Errata 66 @@ -1708,6 +1708,20 @@ static int apply_cpu_errata_fixes(unsigned nodes) } } #endif + + +#if CONFIG_K8_REV_F_SUPPORT == 0 + /* I can't touch this msr on early buggy cpus, and cannot apply either 169 or 131 */ + if (!is_cpu_pre_b3()) +#endif + { + /* Errata 169 */ + /* We also need to set some bits in NB_CFG_MSR, which is handled in src/cpu/amd/model_fxx/ */ + cmd = pci_read_config32(dev, 0x68); + cmd &= ~(1 << 22); + cmd |= (1 << 21); + pci_write_config32(dev, 0x68, cmd); + } } return needs_reset; } |