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authorShelley Chen <shchen@google.com>2021-10-20 15:43:45 -0700
committerShelley Chen <shchen@google.com>2021-11-10 17:24:16 +0000
commit4e9bb3308e811000eb089be6b03658e4cb9a4717 (patch)
treedca19104e9f6144736a042203f53de9802b53a7e /src/northbridge/amd/pi
parent5c163bb86926d982af1ffd93b072ca85070ca1e1 (diff)
Rename ECAM-specific MMCONF Kconfigs
Currently, the MMCONF Kconfigs only support the Enhanced Configuration Access mechanism (ECAM) method for accessing the PCI config address space. Some platforms have a different way of mapping the PCI config space to memory. This patch renames the following configs to make it clear that these configs are ECAM-specific: - NO_MMCONF_SUPPORT --> NO_ECAM_MMCONF_SUPPORT - MMCONF_SUPPORT --> ECAM_MMCONF_SUPPORT - MMCONF_BASE_ADDRESS --> ECAM_MMCONF_BASE_ADDRESS - MMCONF_BUS_NUMBER --> ECAM_MMCONF_BUS_NUMBER - MMCONF_LENGTH --> ECAM_MMCONF_LENGTH Please refer to CB:57861 "Proposed coreboot Changes" for more details. BUG=b:181098581 BRANCH=None TEST=./util/abuild/abuild -p none -t GOOGLE_KOHAKU -x -a -c max Make sure Jenkins verifies that builds on other boards Change-Id: I1e196a1ed52d131a71f00cba1d93a23e54aca3e2 Signed-off-by: Shelley Chen <shchen@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57333 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/northbridge/amd/pi')
-rw-r--r--src/northbridge/amd/pi/00730F01/Kconfig4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/amd/pi/00730F01/Kconfig b/src/northbridge/amd/pi/00730F01/Kconfig
index c1fc9a882e..27ae67323b 100644
--- a/src/northbridge/amd/pi/00730F01/Kconfig
+++ b/src/northbridge/amd/pi/00730F01/Kconfig
@@ -10,10 +10,10 @@ config HW_MEM_HOLE_SIZEK
hex
default 0x100000
-config MMCONF_BASE_ADDRESS
+config ECAM_MMCONF_BASE_ADDRESS
default 0xF8000000
-config MMCONF_BUS_NUMBER
+config ECAM_MMCONF_BUS_NUMBER
default 64
config VGA_BIOS_ID