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authorKyösti Mälkki <kyosti.malkki@gmail.com>2017-04-15 20:07:53 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2017-05-18 06:50:53 +0200
commite87564ffe7d0636699467b776a24adffb2f11cca (patch)
treeb4c4aa66031cfd20f29714d044c67217a439aba2 /src/northbridge/amd/pi/00630F01/northbridge.c
parent61be3603f4b9f353e605d7b7c8d0d9f3b90f5636 (diff)
binaryPI: Fix UMA calculations
Vendorcode decides already in AMD_INIT_POST the exact location of UMA memory. To meet alignment requirements, it will extend uma_memory_size. We cannot calculate base from size and TOP_MEM1, but need to calculate size from base and TOP_MEM1 instead. Also allows selection of UmaMode==UMA_SPECIFIED to manually set amount of memory reserved for framebuffer. Change-Id: I0c375e5da0dfef6cef0c50272356cd32a87b1ff6 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/19346 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/northbridge/amd/pi/00630F01/northbridge.c')
-rw-r--r--src/northbridge/amd/pi/00630F01/northbridge.c50
1 files changed, 1 insertions, 49 deletions
diff --git a/src/northbridge/amd/pi/00630F01/northbridge.c b/src/northbridge/amd/pi/00630F01/northbridge.c
index a83ff0e7f5..5ba0e44ff3 100644
--- a/src/northbridge/amd/pi/00630F01/northbridge.c
+++ b/src/northbridge/amd/pi/00630F01/northbridge.c
@@ -691,46 +691,10 @@ static struct hw_mem_hole_info get_hw_mem_hole_info(void)
}
#endif
-#define ONE_MB_SHIFT 20
-#define ONE_GB_SHIFT 30
-
-static void setup_uma_memory(void)
-{
- uint64_t topmem = bsp_topmem();
- uint64_t topmem2 = bsp_topmem2();
- uint32_t sysmem_mb, sysmem_gb;
-
- sysmem_mb = (topmem + (16ull << ONE_MB_SHIFT)) >> ONE_MB_SHIFT; // Ignore 16MB allocated for C6 when finding UMA size
- sysmem_mb += topmem2 ? ((topmem2 >> ONE_MB_SHIFT) - 4096) : 0;
- sysmem_gb = sysmem_mb >> (ONE_GB_SHIFT - ONE_MB_SHIFT);
- printk(BIOS_SPEW, "%s: system memory size %luGB, topmem2 size %lluMB, topmem size %lluMB\n", __func__, (unsigned long)sysmem_gb, (topmem2 >> ONE_MB_SHIFT), (topmem >> ONE_MB_SHIFT));
-
- /*
- * Refer to UMA_AUTO size computation in the Family15h BKDG.
- * This calculation needs to exactly match the same calculation
- * used by AGESA.
- */
-
- if (sysmem_gb >= 6) {
- uma_memory_size = 1024 << ONE_MB_SHIFT;
- } else if (sysmem_gb >= 4) {
- uma_memory_size = 512 << ONE_MB_SHIFT;
- } else {
- uma_memory_size = 256 << ONE_MB_SHIFT;
- }
- uma_memory_base = topmem - uma_memory_size; /* TOP_MEM1 */
-
- printk(BIOS_INFO, "%s: uma size %lluMB, memory start 0x%08llx\n",
- __func__, uma_memory_size >> ONE_MB_SHIFT, uma_memory_base);
-
- /* TODO: TOP_MEM2 */
-}
-
static void domain_set_resources(device_t dev)
{
unsigned long mmio_basek;
u32 pci_tolm;
- u64 ramtop = 0;
int i, idx;
struct bus *link;
#if CONFIG_HW_MEM_HOLE_SIZEK != 0
@@ -803,8 +767,6 @@ static void domain_set_resources(device_t dev)
ram_resource(dev, (idx | i), basek, pre_sizek);
idx += 0x10;
sizek -= pre_sizek;
- if (!ramtop)
- ramtop = mmio_basek * 1024;
}
basek = mmio_basek;
}
@@ -822,16 +784,9 @@ static void domain_set_resources(device_t dev)
idx += 0x10;
printk(BIOS_DEBUG, "node %d: mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n",
i, mmio_basek, basek, limitk);
- if (!ramtop)
- ramtop = limitk * 1024;
}
- if (IS_ENABLED(CONFIG_GFXUMA)) {
- set_top_of_ram(uma_memory_base);
- uma_resource(dev, 7, uma_memory_base >> 10, uma_memory_size >> 10);
- }
- else
- set_top_of_ram(ramtop);
+ add_uma_resource_below_tolm(dev, 7);
for (link = dev->link_list; link; link = link->next) {
if (link->children) {
@@ -1095,11 +1050,8 @@ static void root_complex_enable_dev(struct device *dev)
{
static int done = 0;
- /* Do not delay UMA setup, as a device on the PCI bus may evaluate
- the global uma_memory variables already in its enable function. */
if (!done) {
setup_bsp_ramtop();
- setup_uma_memory();
done = 1;
}