diff options
author | Arthur Heymans <arthur@aheymans.xyz> | 2018-12-20 10:27:19 +0100 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2018-12-21 18:09:11 +0000 |
commit | 57f70a10dd3743ea96026597bfa9bcde1acbe0ef (patch) | |
tree | 10fa2cc6931a1e413ddb6b1b53f585811bf83223 /src/northbridge/amd/lx/generic_sdram.c | |
parent | 5ef8e6ebd1046693b467bb7ed2a55a53711077de (diff) |
cpu/amd/geode_lx: Drop support
These chips are still using LATE_CBMEM which was agreed upon to
be removed after release 4.7. It is now more than 1 year later
and they still linger around.
The work and review to bring this code up to date can happen on
the 4.9 branch and then squashed together and merged back into
mainline when done.
Change-Id: I11290a5e92397b9b7e7e5a19b029278e728671a3
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/30326
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/northbridge/amd/lx/generic_sdram.c')
-rw-r--r-- | src/northbridge/amd/lx/generic_sdram.c | 42 |
1 files changed, 0 insertions, 42 deletions
diff --git a/src/northbridge/amd/lx/generic_sdram.c b/src/northbridge/amd/lx/generic_sdram.c deleted file mode 100644 index e0869cdbca..0000000000 --- a/src/northbridge/amd/lx/generic_sdram.c +++ /dev/null @@ -1,42 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <console/console.h> -#include <northbridge/amd/lx/raminit.h> - -/* Setup SDRAM */ -void sdram_initialize(int controllers, const struct mem_controller *ctrl) -{ - int i; - /* Set the registers we can set once to reasonable values */ - for (i = 0; i < controllers; i++) { - printk(BIOS_DEBUG, "Ram1.%02x\n", i); - sdram_set_registers(ctrl + i); - } - - /* Now setup those things we can auto detect */ - for (i = 0; i < controllers; i++) { - printk(BIOS_DEBUG, "Ram2.%02x\n", i); - sdram_set_spd_registers(ctrl + i); - } - - /* Now that everything is setup enable the SDRAM. - * Some chipsets do the work for us while on others - * we need to it by hand. - */ - printk(BIOS_DEBUG, "Ram3\n"); - - sdram_enable(controllers, ctrl); - - printk(BIOS_DEBUG, "Ram4\n"); -} |