diff options
| author | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-12-07 03:03:08 +1100 |
|---|---|---|
| committer | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-12-10 07:06:39 +0100 |
| commit | 2d072d415b98804a3cbef5d2478050497b3e7a3d (patch) | |
| tree | 08a7b67e74234ea4786314df34541fbe9926b45a /src/northbridge/amd/gx2 | |
| parent | ddb7a9d4a1e41132f43841d7378d38f2d8dc4175 (diff) | |
northbridge/amd/gx2,lx: Treat MSR constant as unsigned long
Clang complains that a signed shift result (0x210000000)
requires 35 bits to represent, but 'int' only has 32 bits.
However, we write the high bits separately and so this is
a spurious warning.
Change-Id: I3e1c57334077feb50004d7b39abff4bd84ca095b
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7673
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/northbridge/amd/gx2')
| -rw-r--r-- | src/northbridge/amd/gx2/northbridgeinit.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/amd/gx2/northbridgeinit.c b/src/northbridge/amd/gx2/northbridgeinit.c index 136dcf2e02..0cb7803259 100644 --- a/src/northbridge/amd/gx2/northbridgeinit.c +++ b/src/northbridge/amd/gx2/northbridgeinit.c @@ -548,7 +548,7 @@ static void rom_shadow_settings(void) * SYSRC(7:0) = 00h ; writeback, can set to 08h to make writethrough */ #define SYSMEM_RCONF_WRITETHROUGH 8 -#define DEVRC_RCONF_DEFAULT 0x21 +#define DEVRC_RCONF_DEFAULT 0x21ul #define ROMBASE_RCONF_DEFAULT 0xFFFC0000 #define ROMRC_RCONF_DEFAULT 0x25 |