diff options
author | Stefan Reinauer <reinauer@google.com> | 2011-10-13 17:26:10 -0700 |
---|---|---|
committer | Uwe Hermann <uwe@hermann-uwe.de> | 2011-10-14 22:54:06 +0200 |
commit | 86fc9848ae781fca8c7013e785f467d602152395 (patch) | |
tree | e19b7dac70c4209fecfdbf5e2dc181cd0f803530 /src/northbridge/amd/gx2 | |
parent | 89fcdec9721231a2a6faf96462359bb9a2cdda63 (diff) |
Fix compilation of AMD GX2 northbridge code with gcc 4.6
Change-Id: I71d96b7cd36dd99a3590ec311c11f67f13012e68
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/267
Tested-by: build bot (Jenkins)
Reviewed-by: Uwe Hermann <uwe@hermann-uwe.de>
Diffstat (limited to 'src/northbridge/amd/gx2')
-rw-r--r-- | src/northbridge/amd/gx2/northbridgeinit.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/amd/gx2/northbridgeinit.c b/src/northbridge/amd/gx2/northbridgeinit.c index fd8d3f9d8e..e4aaa8bb4c 100644 --- a/src/northbridge/amd/gx2/northbridgeinit.c +++ b/src/northbridge/amd/gx2/northbridgeinit.c @@ -485,7 +485,7 @@ performance: static void GeodeLinkPriority(void) { - msr_t msr; + msr_t msr = { 0, 0 }; struct msrinit *prio = GeodeLinkPriorityTable; int i; @@ -526,7 +526,7 @@ static void setShadowRCONF(uint32_t shadowHi, uint32_t shadowLo) /* ok this is whacky bit translation time. */ int bit; uint8_t shadowByte; - msr_t msr; + msr_t msr = { 0, 0 }; shadowByte = (uint8_t) (shadowLo >> 16); /* load up D000 settings in edx. */ |