Drop \r\n and \n\r as both print_XXX and printk now do this internally.

Only some assembler files still have \r\n ... Can we move that part to C
completely?

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5342 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

2 files changed, 13 insertions, 13 deletions

diff --git a/src/northbridge/amd/gx2/pll_reset.c b/src/northbridge/amd/gx2/pll_reset.c
index 5e6b68ace6..040d7b7a4e 100644
--- a/src/northbridge/amd/gx2/pll_reset.c
+++ b/src/northbridge/amd/gx2/pll_reset.c
@@ -276,11 +276,11 @@ static void pll_reset(void)
 		msr.lo |= PLLMSRlo1;
 		wrmsr(GLCP_SYS_RSTPLL, msr);
 
-		print_debug("Reset PLL\n\r");
+		print_debug("Reset PLL\n");
 
 		msr.lo |= PLLMSRlo2;
 		wrmsr(GLCP_SYS_RSTPLL,msr);
-		print_debug("should not be here\n\r");
+		print_debug("should not be here\n");
 #endif
 		print_err("shit");
 		while (1)
@@ -289,7 +289,7 @@ static void pll_reset(void)
 
 	if (msr.lo & GLCP_SYS_RSTPLL_SWFLAGS_MASK) {
 		/* PLL is already set and we are reboot from PLL reset */
-		print_debug("reboot from BIOS reset\n\r");
+		print_debug("reboot from BIOS reset\n");
 		return;
 	}
 
@@ -310,11 +310,11 @@ static void pll_reset(void)
 	msr.lo |= ((0xde << 16) | (1 << 26) | (1 << 24));
 	wrmsr(0x4c000014, msr);
 
-	print_debug("Reset PLL\n\r");
+	print_debug("Reset PLL\n");
 
 	msr.lo |= ((1<<14) |(1<<13) | (1<<0));
 	wrmsr(0x4c000014,msr);
 
-	print_debug("should not be here\n\r");
+	print_debug("should not be here\n");
 }
 #endif // #if USE_GOODRICH_VERSION
diff --git a/src/northbridge/amd/gx2/raminit.c b/src/northbridge/amd/gx2/raminit.c
index e45d696e35..b1cb1af6b3 100644
--- a/src/northbridge/amd/gx2/raminit.c
+++ b/src/northbridge/amd/gx2/raminit.c
@@ -21,13 +21,13 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
 	msr = rdmsr(0x2000001a);
 	msr.lo = 0x0101;
 	wrmsr(0x2000001a, msr);
-	//print_debug("sdram_enable step 2\r\n");
+	//print_debug("sdram_enable step 2\n");
 
 	/* 3. release CKE mask to enable CKE */
 	msr = rdmsr(0x2000001d);
 	msr.lo &= ~(0x03 << 8);
 	wrmsr(0x2000201d, msr);
-	//print_debug("sdram_enable step 3\r\n");
+	//print_debug("sdram_enable step 3\n");
 
 	/* 4. set and clear REF_TST 16 times, more shouldn't hurt
 	 * why this is before EMRS and MRS ? */
@@ -38,7 +38,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
 		msr.lo &= ~(0x01 << 3);
 		wrmsr(0x20000018, msr);
 	}
-	//print_debug("sdram_enable step 4\r\n");
+	//print_debug("sdram_enable step 4\n");
 
 	/* 5. set refresh interval */
 	msr = rdmsr(0x20000018);
@@ -50,7 +50,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
 	msr.lo &= ~(0x03 << 6);
 	msr.lo |=  (0x00 << 6);
 	wrmsr(0x20000018, msr);
-	//print_debug("sdram_enable step 5\r\n");
+	//print_debug("sdram_enable step 5\n");
 
 	/* 6. enable DLL, load Extended Mode Register by set and clear PROG_DRAM */
 	msr = rdmsr(0x20000018);
@@ -58,7 +58,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
 	wrmsr(0x20000018, msr);
 	msr.lo &= ~((0x01 << 28) | 0x01);
 	wrmsr(0x20000018, msr);
-	//print_debug("sdram_enable step 6\r\n");
+	//print_debug("sdram_enable step 6\n");
 
 	/* 7. Reset DLL, Bit 27 is undocumented in GX datasheet,
 	 * it is documented in LX datasheet  */	
@@ -68,7 +68,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
 	wrmsr(0x20000018, msr);
 	msr.lo &= ~((0x01 << 27) | 0x01);
 	wrmsr(0x20000018, msr);
-	//print_debug("sdram_enable step 7\r\n");
+	//print_debug("sdram_enable step 7\n");
 
 	/* 8. load Mode Register by set and clear PROG_DRAM */
 	msr = rdmsr(0x20000018);
@@ -76,7 +76,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
 	wrmsr(0x20000018, msr);
 	msr.lo &= ~0x01;
 	wrmsr(0x20000018, msr);
-	//print_debug("sdram_enable step 8\r\n");
+	//print_debug("sdram_enable step 8\n");
 
 	/* wait 200 SDCLKs */
 	for (i = 0; i < 200; i++)
@@ -107,7 +107,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
 	/* make sure there is nothing stale in the cache */
 	__asm__("wbinvd\n");
 
-	print_debug("RAM DLL lock\r\n");
+	print_debug("RAM DLL lock\n");
 	/* The RAM dll needs a write to lock on so generate a few dummy writes */
 	volatile unsigned long *ptr;
 	for (i=0;i<5;i++) {