diff options
| author | Li-Ta Lo <ollie@lanl.gov> | 2006-04-27 20:44:53 +0000 |
|---|---|---|
| committer | Li-Ta Lo <ollie@lanl.gov> | 2006-04-27 20:44:53 +0000 |
| commit | 64f07fb21ce77994e929c1cadc61f0c77b7dd04e (patch) | |
| tree | e91045af40be8bb2754f1ec8cf4cfe4df55bd967 /src/northbridge/amd/gx2/raminit.c | |
| parent | c1a4b2b0e56d5c12622e5c0841cabf599311c896 (diff) | |
remove more code
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2285 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/amd/gx2/raminit.c')
| -rw-r--r-- | src/northbridge/amd/gx2/raminit.c | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/src/northbridge/amd/gx2/raminit.c b/src/northbridge/amd/gx2/raminit.c index 2392775437..210172ef8e 100644 --- a/src/northbridge/amd/gx2/raminit.c +++ b/src/northbridge/amd/gx2/raminit.c @@ -51,6 +51,8 @@ struct msr_defaults { int msr_no; unsigned long hi, lo; }; + + const struct msr_defaults msr_defaults [] = { {0x1700, .hi = 0, .lo = IM_QWAIT}, {0x1800, .hi = DMCF_WRITE_SERIALIZE_REQUEST, .lo = DMCF_SERIAL_LOAD_MISSES}, @@ -95,10 +97,7 @@ const struct msr_defaults msr_defaults [] = { #define SMM_OFFSET 0x40400000 #define SMM_SIZE 256 -/* - * FixME: MSR 0x10000028, 0x40000029 are reprogrammed by SysmemInit() - * 0x10000026 and 0x400000023 are reprogrammed by SMMGL0Init() and SMMGL1Init() - */ + void setup_gx2(void) { @@ -165,12 +164,12 @@ setup_gx2(void) wrmsr(msr_defaults[0].msr_no, msr); for(i = 0; msr_defaults[i].msr_no; i++) { - // msr_t msr; + //msr_t msr; msr.lo = msr_defaults[i].lo; msr.hi = msr_defaults[i].hi; wrmsr(msr_defaults[i].msr_no, msr); //msr = rdmsr(msr_defaults[i].msr_no); - // print_debug("MSR 0x%x is now 0x%x:0x%x\n", msr_defaults[i].msr_no, msr.hi,msr.lo); + //print_debug("MSR 0x%x is now 0x%x:0x%x\n", msr_defaults[i].msr_no, msr.hi,msr.lo); } } |