diff options
| author | Li-Ta Lo <ollie@lanl.gov> | 2006-02-23 21:39:19 +0000 |
|---|---|---|
| committer | Li-Ta Lo <ollie@lanl.gov> | 2006-02-23 21:39:19 +0000 |
| commit | 108dd2c01eb5a01605862b3c105f0aad75842795 (patch) | |
| tree | b2b3f5f36c81177b2300b7c42f630ccc315e00af /src/northbridge/amd/gx2/northbridge.c | |
| parent | 02bb7892fe36ea1310b00ae7c3883e99ab4f0a43 (diff) | |
preliminary GX DRAM initization. It is not working yet.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2181 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/amd/gx2/northbridge.c')
| -rw-r--r-- | src/northbridge/amd/gx2/northbridge.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/amd/gx2/northbridge.c b/src/northbridge/amd/gx2/northbridge.c index b02ff786cc..3b2bbc15df 100644 --- a/src/northbridge/amd/gx2/northbridge.c +++ b/src/northbridge/amd/gx2/northbridge.c @@ -14,7 +14,6 @@ #define NORTHBRIDGE_FILE "northbridge.c" /* */ - static void optimize_xbus(device_t dev) { /* Optimise X-Bus performance */ @@ -119,7 +118,7 @@ static void pci_domain_set_resources(device_t dev) { device_t mc_dev; uint32_t pci_tolm; - +#if 0 pci_tolm = find_pci_tolm(&dev->link[0]); mc_dev = dev->link[0].children; if (mc_dev) { @@ -162,6 +161,7 @@ static void pci_domain_set_resources(device_t dev) ram_resource(dev, idx++, 0, tolmk); } assign_resources(&dev->link[0]); +#endif } static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max) |