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authorMyles Watson <mylesgw@gmail.com>2009-10-15 13:35:47 +0000
committerMyles Watson <mylesgw@gmail.com>2009-10-15 13:35:47 +0000
commitb8e2027be817159d4606f991475b59fc36b0242d (patch)
tree1ab06caebfc37dbff884d916c43cca6b9562ae85 /src/northbridge/amd/gx2/northbridge.c
parent45b811b13552a94af4713b77613d377561e4ef26 (diff)
Add CONFIG_GENERATE_* for tables so that the user can select which tables not
to build, but by default all the tables that are available are built. Make PIRQ table build for qemu. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4778 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/amd/gx2/northbridge.c')
-rw-r--r--src/northbridge/amd/gx2/northbridge.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/amd/gx2/northbridge.c b/src/northbridge/amd/gx2/northbridge.c
index f6e862a9b7..b20d3d7829 100644
--- a/src/northbridge/amd/gx2/northbridge.c
+++ b/src/northbridge/amd/gx2/northbridge.c
@@ -476,7 +476,7 @@ static struct device_operations cpu_bus_ops = {
void chipsetInit (void);
-#if CONFIG_HAVE_HIGH_TABLES==1
+#if CONFIG_WRITE_HIGH_TABLES==1
#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
extern uint64_t high_tables_base, high_tables_size;
#endif
@@ -503,7 +503,7 @@ static void enable_dev(struct device *dev)
dev->ops = &pci_domain_ops;
pci_set_method(dev);
tomk = ((sizeram() - VIDEO_MB) * 1024) - SMM_SIZE;
-#if CONFIG_HAVE_HIGH_TABLES==1
+#if CONFIG_WRITE_HIGH_TABLES==1
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
high_tables_size = HIGH_TABLES_SIZE * 1024;