amdfam10: Perform major include ".c" cleanup

Previously, all romstages for this northbridge family
would compile via 1 single C file with everything
included into the romstage.c file (!)

This patch separates the build into separate .o modules
and links them accordingly.

Currently compiles and links all fam10 roms without
breaking other roms.

Both DDR2 and DDR3 have been completed

TESTED on REACTS: passes all boot tests for 2 boards
 ASUS KGPE-D16
 ASUS KFSN4-DRE

Some extra changes were required to make it compile
otherwise there were unused functions in included "c" files.
This is because I needed to exchange CIMX
for the native southbridge routines. See in particular:
 advansus/a785e-i
 asus/m5a88-v
 avalue/eax-785e

A followup patch may be required to fix the above boards.
See FIXME, XXX tags

Change-Id: Id0f9849578fd0f8b1eab83aed910902c27354426
Signed-off-by: Damien Zammit <damien@zamaudio.com>
Reviewed-on: https://review.coreboot.org/17625
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Timothy Pearson <tpearson@raptorengineering.com>

1 files changed, 12 insertions, 25 deletions

diff --git a/src/northbridge/amd/amdmct/mct_ddr3/modtrdim.c b/src/northbridge/amd/amdmct/mct_ddr3/modtrdim.c
index 8ed03a0454..1c2a135975 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/modtrdim.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/modtrdim.c
@@ -16,25 +16,12 @@
 
 /* This file contains functions for odt setting on registered DDR3 dimms */
 
-/*
- *-----------------------------------------------------------------------------
- *                                  MODULES USED
- *
- *-----------------------------------------------------------------------------
- */
-/*----------------------------------------------------------------------------
- *                        PROTOTYPES OF LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
+#include <inttypes.h>
+#include <console/console.h>
+#include <string.h>
+#include "mct_d.h"
+#include "mct_d_gcc.h"
 
-/*
- *-----------------------------------------------------------------------------
- *                                EXPORTED FUNCTIONS
- *
- *-----------------------------------------------------------------------------
- */
-/* -----------------------------------------------------------------------------*/
 /**
  *
  *
@@ -49,7 +36,7 @@
  *
  *     @return     tempW1 - Rtt_Nom
  */
-static u32 RttNomTargetRegDimm (sMCTStruct *pMCTData, sDCTStruct *pDCTData, u8 dimm, BOOL wl, u8 MemClkFreq, u8 rank)
+u32 RttNomTargetRegDimm (sMCTStruct *pMCTData, sDCTStruct *pDCTData, u8 dimm, BOOL wl, u8 MemClkFreq, u8 rank)
 {
 	u32 tempW1;
 	tempW1 = 0;
@@ -105,7 +92,7 @@ static u32 RttNomTargetRegDimm (sMCTStruct *pMCTData, sDCTStruct *pDCTData, u8 d
 			}
 			break;
 		default:
-			ASSERT (FALSE);
+			die("modtrdim.c: WTF?");
 		}
 	} else {
 		switch (mctGet_NVbits(NV_MAX_DIMMS_PER_CH)) {
@@ -141,7 +128,7 @@ static u32 RttNomTargetRegDimm (sMCTStruct *pMCTData, sDCTStruct *pDCTData, u8 d
 			}
 			break;
 		default:
-			ASSERT (FALSE);
+			die("modtrdim.c: WTF?");
 		}
 	}
 	return tempW1;
@@ -162,7 +149,7 @@ static u32 RttNomTargetRegDimm (sMCTStruct *pMCTData, sDCTStruct *pDCTData, u8 d
  *
  *      @return    tempW1 - Rtt_Nom
  */
-static u32 RttNomNonTargetRegDimm (sMCTStruct *pMCTData, sDCTStruct *pDCTData, u8 dimm, BOOL wl, u8 MemClkFreq, u8 rank)
+u32 RttNomNonTargetRegDimm (sMCTStruct *pMCTData, sDCTStruct *pDCTData, u8 dimm, BOOL wl, u8 MemClkFreq, u8 rank)
 {
 	if ((wl) && (mctGet_NVbits(NV_MAX_DIMMS_PER_CH) == 2) && (pDCTData->DimmRanks[dimm] == 2) && (rank == 1)) {
 		return 0x00;	/* for non-target dimm during WL, the second rank of a DR dimm need to have Rtt_Nom = OFF */
@@ -187,7 +174,7 @@ static u32 RttNomNonTargetRegDimm (sMCTStruct *pMCTData, sDCTStruct *pDCTData, u
  *      @return    tempW1 - Rtt_Wr
  */
 
-static u32 RttWrRegDimm (sMCTStruct *pMCTData, sDCTStruct *pDCTData, u8 dimm, BOOL wl, u8 MemClkFreq, u8 rank)
+u32 RttWrRegDimm (sMCTStruct *pMCTData, sDCTStruct *pDCTData, u8 dimm, BOOL wl, u8 MemClkFreq, u8 rank)
 {
 	u32 tempW1;
 	tempW1 = 0;
@@ -230,7 +217,7 @@ static u32 RttWrRegDimm (sMCTStruct *pMCTData, sDCTStruct *pDCTData, u8 dimm, BO
 			}
 			break;
 		default:
-			ASSERT (FALSE);
+			die("modtrdim.c: WTF?");
 		}
 	}
 	return tempW1;
@@ -248,7 +235,7 @@ static u32 RttWrRegDimm (sMCTStruct *pMCTData, sDCTStruct *pDCTData, u8 dimm, BO
  *
  *      @return    WrLvOdt
  */
-static u8 WrLvOdtRegDimm (sMCTStruct *pMCTData, sDCTStruct *pDCTData, u8 dimm)
+u8 WrLvOdtRegDimm (sMCTStruct *pMCTData, sDCTStruct *pDCTData, u8 dimm)
 {
 	u8 WrLvOdt1, i;
 	WrLvOdt1 = 0;