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authorTimothy Pearson <tpearson@raptorengineeringinc.com>2015-07-25 01:23:17 -0500
committerMartin Roth <martinroth@google.com>2015-11-16 17:31:48 +0100
commitdc4cb05763fa029d7495f7aa37194f3ee5abaf05 (patch)
tree618b990234696615433d6f3618ccb9d8f3a2ccd9 /src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c
parent323a2af8e25ad2ff9b81b58f5fccd4ea7d39e72f (diff)
nb/amd/mct_ddr3: Fix RDIMM errors due to undefined number of slots
The current code did not define the number of DIMM slots on the mainboard, which lead to incorrect configuration values and occassional training failure. Add preliminary support for DIMM slot count configuration. Change-Id: I488511d6262ffa8207c442d133314aed0f75acfb Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: http://review.coreboot.org/12016 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c')
-rw-r--r--src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c6
1 files changed, 1 insertions, 5 deletions
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c b/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c
index 38991c813f..e5636e2f33 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c
@@ -101,11 +101,7 @@ static uint16_t fam15_receiver_enable_training_seed(struct DCTStatStruc *pDCTsta
uint32_t dword;
uint16_t seed = 0;
- /* FIXME
- * Mainboards need to be able to specify the maximum number of DIMMs installable per channel
- * For now assume a maximum of 2 DIMMs per channel can be installed
- */
- uint8_t MaxDimmsInstallable = 2;
+ uint8_t MaxDimmsInstallable = mctGet_NVbits(NV_MAX_DIMMS_PER_CH);
uint8_t channel = dct;
if (package_type == PT_GR) {