diff options
| author | Timothy Pearson <tpearson@raptorengineeringinc.com> | 2015-07-25 01:23:17 -0500 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2015-11-16 17:31:48 +0100 |
| commit | dc4cb05763fa029d7495f7aa37194f3ee5abaf05 (patch) | |
| tree | 618b990234696615433d6f3618ccb9d8f3a2ccd9 /src/northbridge/amd/amdmct/mct_ddr3/mctsdi.c | |
| parent | 323a2af8e25ad2ff9b81b58f5fccd4ea7d39e72f (diff) | |
nb/amd/mct_ddr3: Fix RDIMM errors due to undefined number of slots
The current code did not define the number of DIMM slots on the
mainboard, which lead to incorrect configuration values and
occassional training failure.
Add preliminary support for DIMM slot count configuration.
Change-Id: I488511d6262ffa8207c442d133314aed0f75acfb
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/12016
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/northbridge/amd/amdmct/mct_ddr3/mctsdi.c')
| -rw-r--r-- | src/northbridge/amd/amdmct/mct_ddr3/mctsdi.c | 12 |
1 files changed, 2 insertions, 10 deletions
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctsdi.c b/src/northbridge/amd/amdmct/mct_ddr3/mctsdi.c index 3300716232..7b7b225aa0 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mctsdi.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mctsdi.c @@ -47,11 +47,7 @@ static uint8_t fam15_rttwr(struct DCTStatStruc *pDCTstat, uint8_t dct, uint8_t d else frequency_index = Get_NB32_DCT(pDCTstat->dev_dct, dct, 0x94) & 0x7; - /* FIXME - * Mainboards need to be able to specify the maximum number of DIMMs installable per channel - * For now assume a maximum of 2 DIMMs per channel can be installed - */ - uint8_t MaxDimmsInstallable = 2; + uint8_t MaxDimmsInstallable = mctGet_NVbits(NV_MAX_DIMMS_PER_CH); if (is_fam15h()) { if (pDCTstat->Status & (1 << SB_LoadReduced)) { @@ -180,11 +176,7 @@ static uint8_t fam15_rttnom(struct DCTStatStruc *pDCTstat, uint8_t dct, uint8_t else frequency_index = Get_NB32_DCT(pDCTstat->dev_dct, dct, 0x94) & 0x7; - /* FIXME - * Mainboards need to be able to specify the maximum number of DIMMs installable per channel - * For now assume a maximum of 2 DIMMs per channel can be installed - */ - uint8_t MaxDimmsInstallable = 2; + uint8_t MaxDimmsInstallable = mctGet_NVbits(NV_MAX_DIMMS_PER_CH); if (is_fam15h()) { if (pDCTstat->Status & (1 << SB_LoadReduced)) { |