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authorDamien Zammit <damien@zamaudio.com>2016-11-28 00:29:10 +1100
committerMartin Roth <martinroth@google.com>2017-01-04 18:56:01 +0100
commit75a3d1fb7c31bc5bd287bf6579ff70c5da9275a7 (patch)
tree618c2bc04f44cf73d3dae288bff0a5e2ef44d616 /src/northbridge/amd/amdmct/mct_ddr3/mctsdi.c
parent6c20b65849aeda664cc40ebc0f0bab2e99768423 (diff)
amdfam10: Perform major include ".c" cleanup
Previously, all romstages for this northbridge family would compile via 1 single C file with everything included into the romstage.c file (!) This patch separates the build into separate .o modules and links them accordingly. Currently compiles and links all fam10 roms without breaking other roms. Both DDR2 and DDR3 have been completed TESTED on REACTS: passes all boot tests for 2 boards ASUS KGPE-D16 ASUS KFSN4-DRE Some extra changes were required to make it compile otherwise there were unused functions in included "c" files. This is because I needed to exchange CIMX for the native southbridge routines. See in particular: advansus/a785e-i asus/m5a88-v avalue/eax-785e A followup patch may be required to fix the above boards. See FIXME, XXX tags Change-Id: Id0f9849578fd0f8b1eab83aed910902c27354426 Signed-off-by: Damien Zammit <damien@zamaudio.com> Reviewed-on: https://review.coreboot.org/17625 Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com> Reviewed-by: Timothy Pearson <tpearson@raptorengineering.com>
Diffstat (limited to 'src/northbridge/amd/amdmct/mct_ddr3/mctsdi.c')
-rw-r--r--src/northbridge/amd/amdmct/mct_ddr3/mctsdi.c38
1 files changed, 28 insertions, 10 deletions
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctsdi.c b/src/northbridge/amd/amdmct/mct_ddr3/mctsdi.c
index 18af172e7c..1fa0c96620 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mctsdi.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mctsdi.c
@@ -14,7 +14,28 @@
* GNU General Public License for more details.
*/
-static uint8_t fam15_dimm_dic(struct DCTStatStruc *pDCTstat, uint8_t dct, uint8_t dimm, uint8_t rank, uint8_t package_type)
+#include <inttypes.h>
+#include <console/console.h>
+#include <string.h>
+#include "mct_d.h"
+#include "mct_d_gcc.h"
+
+static uint8_t is_fam15h(void)
+{
+ uint8_t fam15h = 0;
+ uint32_t family;
+
+ family = cpuid_eax(0x80000001);
+ family = ((family & 0xf00000) >> 16) | ((family & 0xf00) >> 8);
+
+ if (family >= 0x6f)
+ /* Family 15h or later */
+ fam15h = 1;
+
+ return fam15h;
+}
+
+uint8_t fam15_dimm_dic(struct DCTStatStruc *pDCTstat, uint8_t dct, uint8_t dimm, uint8_t rank, uint8_t package_type)
{
uint8_t dic;
@@ -31,7 +52,7 @@ static uint8_t fam15_dimm_dic(struct DCTStatStruc *pDCTstat, uint8_t dct, uint8_
return dic;
}
-static uint8_t fam15_rttwr(struct DCTStatStruc *pDCTstat, uint8_t dct, uint8_t dimm, uint8_t rank, uint8_t package_type)
+uint8_t fam15_rttwr(struct DCTStatStruc *pDCTstat, uint8_t dct, uint8_t dimm, uint8_t rank, uint8_t package_type)
{
uint8_t term = 0;
uint8_t number_of_dimms = pDCTstat->MAdimms[dct];
@@ -265,7 +286,7 @@ static uint8_t fam15_rttwr(struct DCTStatStruc *pDCTstat, uint8_t dct, uint8_t d
return term;
}
-static uint8_t fam15_rttnom(struct DCTStatStruc *pDCTstat, uint8_t dct, uint8_t dimm, uint8_t rank, uint8_t package_type)
+uint8_t fam15_rttnom(struct DCTStatStruc *pDCTstat, uint8_t dct, uint8_t dimm, uint8_t rank, uint8_t package_type)
{
uint8_t term = 0;
uint8_t number_of_dimms = pDCTstat->MAdimms[dct];
@@ -662,9 +683,6 @@ static uint8_t fam15_rttnom(struct DCTStatStruc *pDCTstat, uint8_t dct, uint8_t
return term;
}
-static void mct_DramControlReg_Init_D(struct MCTStatStruc *pMCTstat,
- struct DCTStatStruc *pDCTstat, u8 dct);
-
static void mct_DCTAccessDone(struct DCTStatStruc *pDCTstat, u8 dct)
{
u32 dev = pDCTstat->dev_dct;
@@ -736,8 +754,8 @@ static void mct_SendMrsCmd(struct DCTStatStruc *pDCTstat, u8 dct, u32 EMRS)
printk(BIOS_DEBUG, "%s: Done\n", __func__);
}
-static u32 mct_MR2(struct MCTStatStruc *pMCTstat,
- struct DCTStatStruc *pDCTstat, u8 dct, u32 MrsChipSel)
+u32 mct_MR2(struct MCTStatStruc *pMCTstat,
+ struct DCTStatStruc *pDCTstat, u8 dct, u32 MrsChipSel)
{
u32 dev = pDCTstat->dev_dct;
u32 dword, ret;
@@ -834,8 +852,8 @@ static u32 mct_MR3(struct MCTStatStruc *pMCTstat,
return ret;
}
-static u32 mct_MR1(struct MCTStatStruc *pMCTstat,
- struct DCTStatStruc *pDCTstat, u8 dct, u32 MrsChipSel)
+u32 mct_MR1(struct MCTStatStruc *pMCTstat,
+ struct DCTStatStruc *pDCTstat, u8 dct, u32 MrsChipSel)
{
u32 dev = pDCTstat->dev_dct;
u32 dword, ret;