diff options
author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-06-09 11:59:00 +0200 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2018-06-14 09:32:34 +0000 |
commit | b0f1988f893bf5f581917816b11e810309955143 (patch) | |
tree | c4bcf6f1d9384b99cfcbfab4426de9f9f106e720 /src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c | |
parent | 68c851bcd702e7816cdb6e504f7386ec404ecf13 (diff) |
src: Get rid of unneeded whitespace
Change-Id: I630d49ab504d9f6e052806b516a600fa41b9a8da
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26991
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c')
-rw-r--r-- | src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c index 9aad96cfbc..31c23b9445 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c @@ -115,12 +115,12 @@ u8 ECCInit_D(struct MCTStatStruc *pMCTstat, struct DCTStatStruc *pDCTstatA) OB_ECCRedir = mctGet_NVbits(NV_ECCRedir); /* ECC Redirection */ - OB_ChipKill = mctGet_NVbits(NV_ChipKill); /* ECC Chip-kill mode */ + OB_ChipKill = mctGet_NVbits(NV_ChipKill); /* ECC Chip-kill mode */ OF_ScrubCTL = 0; /* Scrub CTL for Dcache, L2, and dram */ if (!is_fam15h()) { nvbits = mctGet_NVbits(NV_DCBKScrub); - /* mct_AdjustScrub_D(pDCTstatA, &nvbits); */ /* Need not adjust */ + /* mct_AdjustScrub_D(pDCTstatA, &nvbits); */ /* Need not adjust */ OF_ScrubCTL |= (u32) nvbits << 16; nvbits = mctGet_NVbits(NV_L2BKScrub); |