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authorTimothy Pearson <tpearson@raptorengineeringinc.com>2015-06-26 17:49:25 -0500
committerStefan Reinauer <stefan.reinauer@coreboot.org>2015-11-15 02:45:13 +0100
commitdee6b1ff399282bdeff9d76d238a441363bde59a (patch)
tree45d4b660b486a441f2e5da331a8ccc597aa3eba5 /src/northbridge/amd/amdmct/mct_ddr3/mct_d_gcc.h
parentf3aa375f44531ca4a504186d76e69b6d07dc4ae7 (diff)
northbridge/amd/amdmct/mct_ddr3: Set SkewMemClk when both DCTs are in use
When both DCTs of a node are in use the DRAM clocks should be skewed with respect to one another in order to reduce cross-channel interference. Set the clock skew bit according to the BKDG recommendations. Change-Id: Ibcce54fc53b79beba2f790994bcf87cc0354213a Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: http://review.coreboot.org/12011 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/northbridge/amd/amdmct/mct_ddr3/mct_d_gcc.h')
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