diff options
author | Timothy Pearson <tpearson@raptorengineering.com> | 2017-01-08 14:00:48 -0600 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2017-01-10 17:22:33 +0100 |
commit | a4dcdca7ba4ef771272a1010be0268c8cf697058 (patch) | |
tree | 1e749257aa340661516d3a7fa9034a2b1c82e891 /src/northbridge/amd/amdmct/mct_ddr3/mct_d.c | |
parent | 8c42424ec1669036fb4a7be4eb7ec0915bd6966c (diff) |
amd/mct/ddr2|ddr3: Refactor persistent members of DCTStatStruc
Several members of DCTStatStruc are designed to persist across resets of
all other members. Move the persistent members into a substructure in
order to simplify the reset logic and avoid compiler warnings / UB.
Change-Id: I1139b7b3b167d33d99619338d42fcd26e2581a5d
Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
Reviewed-on: https://review.coreboot.org/18058
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/northbridge/amd/amdmct/mct_ddr3/mct_d.c')
-rw-r--r-- | src/northbridge/amd/amdmct/mct_ddr3/mct_d.c | 18 |
1 files changed, 4 insertions, 14 deletions
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c index d1d6e8f455..45b987bd61 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2015-2016 Raptor Engineering, LLC + * Copyright (C) 2015-2017 Raptor Engineering, LLC * Copyright (C) 2010 Advanced Micro Devices, Inc. * * This program is free software; you can redistribute it and/or modify @@ -3732,7 +3732,7 @@ static void LoadDQSSigTmgRegs_D(struct MCTStatStruc *pMCTstat, 2); /* Pass Second Pass ? */ /* Restore Write levelization training data */ for (ByteLane = 0; ByteLane < 9; ByteLane ++) { - txdqs = pDCTstat->CH_D_B_TxDqs[Channel][Receiver >> 1][ByteLane]; + txdqs = pDCTstat->persistentData.CH_D_B_TxDqs[Channel][Receiver >> 1][ByteLane]; index = Table_DQSRcvEn_Offset[ByteLane >> 1]; index += (Receiver >> 1) * 3 + 0x10 + 0x20; /* Addl_Index */ val = Get_NB32_index_wait_DCT(dev, Channel, 0x98, index); @@ -7373,23 +7373,13 @@ static void mct_ResetDataStruct_D(struct MCTStatStruc *pMCTstat, { uint8_t Node; struct DCTStatStruc *pDCTstat; - uint16_t host_serv1, host_serv2; - uint8_t CH_D_B_TxDqs_bkp[2][4][9]; /* Initialize Data structures by clearing all entries to 0 */ - memset(pMCTstat, 0, sizeof(struct MCTStatStruc)); + memset(pMCTstat, 0, sizeof(*pMCTstat)); for (Node = 0; Node < 8; Node++) { pDCTstat = pDCTstatA + Node; - host_serv1 = pDCTstat->HostBiosSrvc1; - host_serv2 = pDCTstat->HostBiosSrvc2; - memcpy(CH_D_B_TxDqs_bkp, pDCTstat->CH_D_B_TxDqs, sizeof(CH_D_B_TxDqs_bkp)); - - memset(pDCTstat, 0, sizeof(struct DCTStatStruc)); - - pDCTstat->HostBiosSrvc1 = host_serv1; - pDCTstat->HostBiosSrvc2 = host_serv2; - memcpy(pDCTstat->CH_D_B_TxDqs, CH_D_B_TxDqs_bkp, sizeof(pDCTstat->CH_D_B_TxDqs)); + memset(pDCTstat, 0, sizeof(*pDCTstat) - sizeof(pDCTstat->persistentData)); } } |