diff options
author | Timothy Pearson <tpearson@raptorengineeringinc.com> | 2015-06-08 19:54:56 -0500 |
---|---|---|
committer | Ronald G. Minnich <rminnich@gmail.com> | 2015-11-11 20:30:45 +0100 |
commit | 45de61de8bb5ef15a900415a482449cfde019549 (patch) | |
tree | 8150b83a3ed9be38ac01996a511d17f1297e426e /src/northbridge/amd/amdmct/mct_ddr3/mct_d.c | |
parent | 83abd81c8acb3a53dfc125e248d9e5fd58f3e0f7 (diff) |
northbridge/amd/amdmct: Skip DCT config write to Flash if unchanged
Change-Id: I5fee5f5fdf30ab6e3c4f94ed3e54ea66c1204352
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/11980
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Diffstat (limited to 'src/northbridge/amd/amdmct/mct_ddr3/mct_d.c')
-rw-r--r-- | src/northbridge/amd/amdmct/mct_ddr3/mct_d.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c index 1d48070084..2d8ab34c61 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c @@ -1368,6 +1368,7 @@ restartinit: printk(BIOS_DEBUG, "mctAutoInitMCT_D: Restoring DCT configuration from NVRAM\n"); if (restore_mct_information_from_nvram(0) != 0) printk(BIOS_CRIT, "%s: ERROR: Unable to restore DCT configuration from NVRAM\n", __func__); + pMCTstat->GStatus |= 1 << GSB_ConfigRestored; #endif printk(BIOS_DEBUG, "mctAutoInitMCT_D: mct_ForceNBPState0_Dis_Fam15\n"); @@ -2095,6 +2096,8 @@ static void DQSTiming_D(struct MCTStatStruc *pMCTstat, if (is_fam15h()) exit_training_mode_fam15(pMCTstat, pDCTstatA); + + pMCTstat->GStatus |= 1 << GSB_ConfigRestored; } /* FIXME - currently uses calculated value TrainMaxReadLatency_D(pMCTstat, pDCTstatA); */ |