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authorZheng Bao <zheng.bao@amd.com>2010-10-09 07:18:50 +0000
committerZheng Bao <Zheng.Bao@amd.com>2010-10-09 07:18:50 +0000
commit53b52f356abe8212f8b06b14c3237ca05b71d597 (patch)
tree58f9c1787aebe84ad24ead91f4e1c5f53f56c418 /src/northbridge/amd/amdmct/mct/mctmtr_d.c
parent1dcf66896dc90edee0dd8eda4d99618f1bc1dcb8 (diff)
Trivial. Spell checking.
Signed-off-by: Zheng Bao <zheng.bao@amd.com> Acked-by: Zheng Bao <zheng.bao@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5928 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/amd/amdmct/mct/mctmtr_d.c')
-rw-r--r--src/northbridge/amd/amdmct/mct/mctmtr_d.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/northbridge/amd/amdmct/mct/mctmtr_d.c b/src/northbridge/amd/amdmct/mct/mctmtr_d.c
index 64500f0d58..bc8e944328 100644
--- a/src/northbridge/amd/amdmct/mct/mctmtr_d.c
+++ b/src/northbridge/amd/amdmct/mct/mctmtr_d.c
@@ -38,7 +38,7 @@ void CPUMemTyping_D(struct MCTStatStruc *pMCTstat,
u32 lo, hi;
/* Set temporary top of memory from Node structure data.
- * Adjust temp top of memory down to accomodate 32-bit IO space.
+ * Adjust temp top of memory down to accommodate 32-bit IO space.
* Bottom40bIO=top of memory, right justified 8 bits
* (defines dram versus IO space type)
* Bottom32bIO=sub 4GB top of memory, right justified 8 bits
@@ -151,7 +151,7 @@ static void SetMTRRrange_D(u32 Base, u32 *pLimit, u32 *pMtrrAddr, u16 MtrrType)
* 2. Each range must be naturally aligned (Base is same as size)
*
* There are two code paths: the ascending path and descending path
- * (analogous to bsf and bsr), where the next limit is a funtion of the
+ * (analogous to bsf and bsr), where the next limit is a function of the
* next set bit in a forward or backward sequence of bits (as a function
* of the Limit). We start with the ascending path, to ensure that
* regions are naturally aligned, then we switch to the descending path
@@ -219,7 +219,7 @@ void UMAMemTyping_D(struct MCTStatStruc *pMCTstat, struct DCTStatStruc *pDCTstat
u32 lo, hi;
/*======================================================================
- * Adjust temp top of memory down to accomodate UMA memory start
+ * Adjust temp top of memory down to accommodate UMA memory start
*======================================================================*/
/* Bottom32bIO=sub 4GB top of memory, right justified 8 bits
* (defines dram versus IO space type)