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authorStefan Reinauer <stepan@coresystems.de>2010-07-07 21:59:06 +0000
committerStefan Reinauer <stepan@openbios.org>2010-07-07 21:59:06 +0000
commit5e33e827083abe332cf404793d33fa2152a95bab (patch)
tree253a2f387816e3aff23d1d4f598dd460c7015544 /src/northbridge/amd/amdk8
parent42da0e6da6edd2dfe7fd752719ec5d2c94d5e055 (diff)
fix some more warnings
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5658 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/amd/amdk8')
-rw-r--r--src/northbridge/amd/amdk8/amdk8.h3
-rw-r--r--src/northbridge/amd/amdk8/amdk8_f.h2
-rw-r--r--src/northbridge/amd/amdk8/amdk8_pre_f.h1
-rw-r--r--src/northbridge/amd/amdk8/coherent_ht.c35
-rw-r--r--src/northbridge/amd/amdk8/raminit_f_dqs.c4
-rw-r--r--src/northbridge/amd/amdk8/setup_resource_map.c4
6 files changed, 28 insertions, 21 deletions
diff --git a/src/northbridge/amd/amdk8/amdk8.h b/src/northbridge/amd/amdk8/amdk8.h
index 3f849c0c8a..cc970c5906 100644
--- a/src/northbridge/amd/amdk8/amdk8.h
+++ b/src/northbridge/amd/amdk8/amdk8.h
@@ -8,8 +8,9 @@
#include "amdk8_pre_f.h"
#endif
-#ifndef __ROMCC__
+#ifdef __PRE_RAM__
void showallroutes(int level, device_t dev);
+void setup_resource_map_offset(const unsigned int *register_values, int max, unsigned offset_pci_dev, unsigned offset_io_base);
#endif
#endif /* AMDK8_H */
diff --git a/src/northbridge/amd/amdk8/amdk8_f.h b/src/northbridge/amd/amdk8/amdk8_f.h
index 283e32e235..769f5980ba 100644
--- a/src/northbridge/amd/amdk8/amdk8_f.h
+++ b/src/northbridge/amd/amdk8/amdk8_f.h
@@ -1,6 +1,6 @@
#ifndef AMDK8_F_H
-
#define AMDK8_F_H
+
/* Definitions of various K8 registers */
/* Function 0 */
#define HT_TRANSACTION_CONTROL 0x68
diff --git a/src/northbridge/amd/amdk8/amdk8_pre_f.h b/src/northbridge/amd/amdk8/amdk8_pre_f.h
index 95293ee236..dae2d97cd3 100644
--- a/src/northbridge/amd/amdk8/amdk8_pre_f.h
+++ b/src/northbridge/amd/amdk8/amdk8_pre_f.h
@@ -1,5 +1,4 @@
#ifndef AMDK8_PRE_F_H
-
#define AMDK8_PRE_F_H
/* Definitions of various K8 registers */
diff --git a/src/northbridge/amd/amdk8/coherent_ht.c b/src/northbridge/amd/amdk8/coherent_ht.c
index 293abc7067..ad787caabd 100644
--- a/src/northbridge/amd/amdk8/coherent_ht.c
+++ b/src/northbridge/amd/amdk8/coherent_ht.c
@@ -206,12 +206,12 @@ static void enable_routing(u8 node)
print_spew(" done.\n");
}
+#if CONFIG_MAX_PHYSICAL_CPUS > 1
static void fill_row(u8 node, u8 row, u32 value)
{
pci_write_config32(NODE_HT(node), 0x40+(row<<2), value);
}
-#if CONFIG_MAX_PHYSICAL_CPUS > 1
static u8 link_to_register(int ldt)
{
/*
@@ -447,28 +447,33 @@ static void setup_row_direct_x(u8 temp, u8 source, u8 dest, u8 linkn)
}
#if CROSS_BAR_47_56
-static void opt_broadcast_rt(u8 source, u8 dest, u8 kickout) {
+static void opt_broadcast_rt(u8 source, u8 dest, u8 kickout)
+{
uint32_t val;
val = get_row(source, dest);
val -= link_connection(source, kickout)<<16;
fill_row(source, dest, val);
}
-static void opt_broadcast_rt_group(const u8 *conn, int num) {
+static void opt_broadcast_rt_group(const u8 *conn, int num)
+{
int i;
for(i=0; i<num; i+=3) {
opt_broadcast_rt(conn[i], conn[i+1],conn[i+2]);
}
}
-static void opt_broadcast_rt_plus(u8 source, u8 dest, u8 kickout) {
+
+static void opt_broadcast_rt_plus(u8 source, u8 dest, u8 kickout)
+{
uint32_t val;
val = get_row(source, dest);
val += link_connection(source, kickout)<<16;
fill_row(source, dest, val);
}
-static void opt_broadcast_rt_plus_group(const u8 *conn, int num) {
+static void opt_broadcast_rt_plus_group(const u8 *conn, int num)
+{
int i;
for(i=0; i<num; i+=3) {
@@ -477,27 +482,22 @@ static void opt_broadcast_rt_plus_group(const u8 *conn, int num) {
}
#endif
-static void setup_row_direct(u8 source, u8 dest, u8 linkn){
+static void setup_row_direct(u8 source, u8 dest, u8 linkn)
+{
setup_row_direct_x(source, source, dest, linkn);
}
-static void setup_remote_row_direct(u8 source, u8 dest, u8 linkn){
+static void setup_remote_row_direct(u8 source, u8 dest, u8 linkn)
+{
setup_row_direct_x(7, source, dest, linkn);
}
static void setup_temp_row(u8 source, u8 dest)
{
- /* copy val from (source, dest) to (source,7) */
- fill_row(source,7,get_row(source,dest));
+ /* copy value from (source, dest) to (source,7) */
+ fill_row(source, 7, get_row(source, dest));
}
-#if 0
-static void clear_temp_row(u8 source)
-{
- fill_row(source, 7, DEFAULT);
-}
-#endif
-
static void setup_remote_node(u8 node)
{
static const uint8_t pci_reg[] = {
@@ -670,7 +670,8 @@ static void setup_uniprocessor(void)
}
#if CONFIG_MAX_PHYSICAL_CPUS > 2
-static int optimize_connection_group(const u8 *opt_conn, int num) {
+static int optimize_connection_group(const u8 *opt_conn, int num)
+{
int needs_reset = 0;
int i;
for(i=0; i<num; i+=2) {
diff --git a/src/northbridge/amd/amdk8/raminit_f_dqs.c b/src/northbridge/amd/amdk8/raminit_f_dqs.c
index 81e38ecc6d..5303a67b32 100644
--- a/src/northbridge/amd/amdk8/raminit_f_dqs.c
+++ b/src/northbridge/amd/amdk8/raminit_f_dqs.c
@@ -1717,6 +1717,7 @@ static unsigned int range_to_mtrr(unsigned int reg,
return reg;
}
+#if CONFIG_MEM_TRAIN_SEQ == 1
static void set_top_mem_ap(unsigned tom_k, unsigned tom2_k)
{
msr_t msr;
@@ -1730,6 +1731,7 @@ static void set_top_mem_ap(unsigned tom_k, unsigned tom2_k)
msr.hi = (tom_k & 0xffc00000) >> 22;
wrmsr(TOP_MEM, msr);
}
+#endif
static void setup_mtrr_dqs(unsigned tom_k, unsigned tom2_k)
{
@@ -1802,6 +1804,7 @@ static void set_htic_bit(unsigned i, unsigned val, unsigned bit)
}
+#if CONFIG_MEM_TRAIN_SEQ == 1
static unsigned get_htic_bit(unsigned i, unsigned bit)
{
uint32_t dword;
@@ -1816,6 +1819,7 @@ static void wait_till_sysinfo_in_ram(void)
if(get_htic_bit(0, 9)) return;
}
}
+#endif
static void set_sysinfo_in_ram(unsigned val)
{
diff --git a/src/northbridge/amd/amdk8/setup_resource_map.c b/src/northbridge/amd/amdk8/setup_resource_map.c
index f7621a421f..8d1052e845 100644
--- a/src/northbridge/amd/amdk8/setup_resource_map.c
+++ b/src/northbridge/amd/amdk8/setup_resource_map.c
@@ -1,6 +1,8 @@
+#include "amdk8.h"
+
#define RES_DEBUG 0
-static void setup_resource_map_offset(const unsigned int *register_values, int max, unsigned offset_pci_dev, unsigned offset_io_base)
+void setup_resource_map_offset(const unsigned int *register_values, int max, unsigned offset_pci_dev, unsigned offset_io_base)
{
int i;
#if RES_DEBUG