diff options
| author | Ronald G. Minnich <rminnich@gmail.com> | 2003-07-25 03:05:54 +0000 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2003-07-25 03:05:54 +0000 |
| commit | ebb645a9fb5d81a8ea701fd53a2bf63bb899d51c (patch) | |
| tree | 0e3d1fd63952a0f3715d567f5194e23a23f59a6e /src/northbridge/amd/amdk8/raminit.c | |
| parent | feaa75960cf1e731934d95b5e954d213bc72becf (diff) | |
YhLu's changes to resolve several memory and other problems.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1036 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/amd/amdk8/raminit.c')
| -rw-r--r-- | src/northbridge/amd/amdk8/raminit.c | 23 |
1 files changed, 19 insertions, 4 deletions
diff --git a/src/northbridge/amd/amdk8/raminit.c b/src/northbridge/amd/amdk8/raminit.c index 1b258c62ce..6659641a1f 100644 --- a/src/northbridge/amd/amdk8/raminit.c +++ b/src/northbridge/amd/amdk8/raminit.c @@ -1249,7 +1249,14 @@ static void order_dimms(const struct mem_controller *ctrl) tom |= (1 << (canidate + 24)); /* Recompute the cs base register value */ - csbase = (tom << 21) | 1; +#if 1 // BY LYH Need to count from 0 for every memory controller + csbase = ((tom - (base_k>>15))<< 21) | 1; + print_debug("csbase="); + print_debug_hex32(csbase); + print_debug("\r\n"); +#else //BY LYH END + csbase = (tom << 21) | 1; +#endif /* Increment the top of memory */ tom += size; @@ -1276,6 +1283,14 @@ static void order_dimms(const struct mem_controller *ctrl) print_debug("\r\n"); #endif route_dram_accesses(ctrl, base_k, tom_k); + +#if 0 //BY LYH + if(ctrl->node_id==1) { + pci_write_config32(ctrl->f2, DRAM_CSBASE, 0x00000001); + + } +#endif + set_top_mem(tom_k); } @@ -2224,12 +2239,12 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl) print_debug_hex32(dcl); print_debug("\r\n"); #endif -#if 1 +#if 0 dcl &= ~DCL_DimmEccEn; #endif #warning "FIXME set the ECC type to perform" #warning "FIXME initialize the scrub registers" -#if 0 +#if 1 if (dcl & DCL_DimmEccEn) { print_debug("ECC enabled\r\n"); } @@ -2260,7 +2275,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl) } else { print_debug(" done\r\n"); } -#if 0 +#if 1 if (dcl & DCL_DimmEccEn) { print_debug("Clearing memory: "); loops = 0; |