diff options
author | Eric Biederman <ebiederm@xmission.com> | 2003-07-17 06:34:30 +0000 |
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committer | Eric Biederman <ebiederm@xmission.com> | 2003-07-17 06:34:30 +0000 |
commit | b03b33697d44fb4140922d47a4df1edd25a40a74 (patch) | |
tree | 6bea6160d290b3e26b817afb100575ae473db389 /src/northbridge/amd/amdk8/raminit.c | |
parent | 2ec0020b3c703122cbe7c1b26ac3ad7ea8074464 (diff) |
- Update Config so we now have the proper number of cpus
- Remove some debugging code from auto.c
- Update coeherent_ht.c so we get the proper broadcast routes.
- Fix the dram probing code.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@973 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/amd/amdk8/raminit.c')
-rw-r--r-- | src/northbridge/amd/amdk8/raminit.c | 15 |
1 files changed, 8 insertions, 7 deletions
diff --git a/src/northbridge/amd/amdk8/raminit.c b/src/northbridge/amd/amdk8/raminit.c index fac6e1adee..fd5956743f 100644 --- a/src/northbridge/amd/amdk8/raminit.c +++ b/src/northbridge/amd/amdk8/raminit.c @@ -1123,20 +1123,21 @@ static void route_dram_accesses(const struct mem_controller *ctrl, { #warning "FIXME this is hardcoded for one cpu" unsigned node_id; - unsigned link_id; unsigned limit; + unsigned base; node_id = 0; - link_id = 0; /* Route the addresses to node 0 */ limit = (limit_k << 2); limit &= 0xffff0000; limit -= 0x00010000; - pci_write_config32(ctrl->f1, 0x44, limit | (0 << 7) | (link_id << 4) | (node_id << 0)); - pci_write_config32(ctrl->f1, 0x40, (base_k << 2) | (0 << 8) | (1<<1) | (1<<0)); + base = (base_k << 2); + base &= 0xffff0000; + pci_write_config32(ctrl->f1, 0x44, limit | (0 << 8) | (node_id << 0)); + pci_write_config32(ctrl->f1, 0x40, base | (0 << 8) | (1<<1) | (1<<0)); -#if 1 - pci_write_config32(PCI_DEV(0, 0x19, 1), 0x44, limit | (0 << 7) | (link_id << 4) | (node_id << 0)); - pci_write_config32(PCI_DEV(0, 0x19, 1), 0x40, (base_k << 2) | (0 << 8) | (1<<1) | (1<<0)); +#if 0 + pci_write_config32(PCI_DEV(0, 0x19, 1), 0x44, limit | (0 << 8) | (1 << 4) | (node_id << 0)); + pci_write_config32(PCI_DEV(0, 0x19, 1), 0x40, base | (0 << 8) | (1<<1) | (1<<0)); #endif } |