diff options
author | Li-Ta Lo <ollie@lanl.gov> | 2004-05-05 21:15:42 +0000 |
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committer | Li-Ta Lo <ollie@lanl.gov> | 2004-05-05 21:15:42 +0000 |
commit | 9782f7538c3a7c0623d2177d10cc7785336da47c (patch) | |
tree | f5b667044771e5a490ceed4f289b4fe0f1312c06 /src/northbridge/amd/amdk8/northbridge.c | |
parent | 7ccff4ea0c1773e57b380cf7477febd64b58afea (diff) |
code refromat, doxidization
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1547 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/amd/amdk8/northbridge.c')
-rw-r--r-- | src/northbridge/amd/amdk8/northbridge.c | 19 |
1 files changed, 18 insertions, 1 deletions
diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c index 867654cdf5..8a252d0054 100644 --- a/src/northbridge/amd/amdk8/northbridge.c +++ b/src/northbridge/amd/amdk8/northbridge.c @@ -485,6 +485,24 @@ static void amdk8_set_resources(device_t dev) } } +/** + * @brief Scan root bus for AMD K8 systems + * + * @param root the root device structure + * @max the current bus number scanned so far, usually 0x00 + * + * The root device in a AMD K8 system is not at Bus 0, Device 0, Fun 0 + * as other PCI based systems. The northbridge is at Bus 0, Device 0x18, + * Fun 0. We have to call the pci_scan_bus() with PCI_DEVFN(0x18,0) as + * the starting device instead of PCI_DEVFN(0x0, 0) as in the default + * root_dev_scan_pci_bus(). + * + * This function is set up as the default scan_bus() method for mainboards' + * device_operations for AMD K8 mainboards in mainboard.c + * + * @see device_operation() + * @see root_dev_scan_pci_bus() + */ unsigned int amdk8_scan_root_bus(device_t root, unsigned int max) { unsigned reg; @@ -492,7 +510,6 @@ unsigned int amdk8_scan_root_bus(device_t root, unsigned int max) printk_debug("amdk8_scan_root_bus\n"); /* Unmap all of the HT chains */ - printk_debug("amdk8_scan_root_bus: clearing HT registers\n"); for (reg = 0xe0; reg <= 0xec; reg += 4) { f1_write_config32(reg, 0); } |