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authorLi-Ta Lo <ollie@lanl.gov>2004-04-26 17:51:20 +0000
committerLi-Ta Lo <ollie@lanl.gov>2004-04-26 17:51:20 +0000
commit5782d273eb79ed32d344273cf344b1580a936183 (patch)
tree37f7e3d68dcab4cc42fb09ca54d5250d910e9763 /src/northbridge/amd/amdk8/coherent_ht.c
parent1e1a34fdd184a85569b645923b743ec5524fab1d (diff)
check in the current code for IBM/E325, can somebody help to fix it ?
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1538 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/amd/amdk8/coherent_ht.c')
-rw-r--r--src/northbridge/amd/amdk8/coherent_ht.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/northbridge/amd/amdk8/coherent_ht.c b/src/northbridge/amd/amdk8/coherent_ht.c
index 43054ed6e3..10d1da7627 100644
--- a/src/northbridge/amd/amdk8/coherent_ht.c
+++ b/src/northbridge/amd/amdk8/coherent_ht.c
@@ -507,7 +507,7 @@ static void coherent_ht_finalize(unsigned cpus)
* registers on Hammer A0 revision.
*/
-#if 0
+#if 1
print_debug("coherent_ht_finalize\r\n");
#endif
rev_a0 = is_cpu_rev_a0();
@@ -537,15 +537,14 @@ static void coherent_ht_finalize(unsigned cpus)
pci_write_config32(dev, 0x68, val);
if (rev_a0) {
+ print_debug("shit it is an old cup\n");
pci_write_config32(dev, 0x94, 0);
pci_write_config32(dev, 0xb4, 0);
pci_write_config32(dev, 0xd4, 0);
}
-
-
}
-#if 0
+#if 1
print_debug("done\r\n");
#endif
}
@@ -619,7 +618,8 @@ static int optimize_link_read_pointers(unsigned cpus, int needs_reset)
link_type = pci_read_config32(f0_dev, reg);
if (link_type & LinkConnected) {
cmd &= 0xff << (link *8);
- /* FIXME this assumes the device on the other side is an AMD device */
+ /* FIXME this assumes the device on the other
+ * side is an AMD device */
cmd |= 0x25 << (link *8);
}
}