aboutsummaryrefslogtreecommitdiff
path: root/src/northbridge/amd/amdk8/coherent_ht.c
diff options
context:
space:
mode:
authorEric Biederman <ebiederm@xmission.com>2003-06-12 17:55:54 +0000
committerEric Biederman <ebiederm@xmission.com>2003-06-12 17:55:54 +0000
commit540ae01cd341de75f5eb57906699ca24667d71cc (patch)
tree19b50f63003cea377301d19228f79391e89403fd /src/northbridge/amd/amdk8/coherent_ht.c
parent05f26fcb571340b17beaca16939a025a9c0b4cdd (diff)
- Changes to the pci config routines moving them closer to the non romcc API
The goal is to have the same interface with or without romcc. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@868 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/amd/amdk8/coherent_ht.c')
-rw-r--r--src/northbridge/amd/amdk8/coherent_ht.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/src/northbridge/amd/amdk8/coherent_ht.c b/src/northbridge/amd/amdk8/coherent_ht.c
index 9b799b3d31..81f044cc13 100644
--- a/src/northbridge/amd/amdk8/coherent_ht.c
+++ b/src/northbridge/amd/amdk8/coherent_ht.c
@@ -574,6 +574,8 @@ static void setup_coherent_ht_domain(void)
print_debug("setting up coherent ht domain....\r\n");
max = sizeof(register_values)/sizeof(register_values[0]);
for(i = 0; i < max; i += 3) {
+ device_t dev;
+ unsigned where;
unsigned long reg;
#if 0
print_debug_hex32(register_values[i]);
@@ -581,10 +583,18 @@ static void setup_coherent_ht_domain(void)
print_debug_hex32(register_values[i+2]);
print_debug("\r\n");
#endif
+ dev = register_values[i] & ~0xff;
+ where = register_values[i] & 0xff;
+ reg = pci_read_config32(dev, where);
+ reg &= register_values[i+1];
+ reg |= register_values[i+2];
+ pci_write_config32(dev, where, reg);
+#if 0
reg = pci_read_config32(register_values[i]);
reg &= register_values[i+1];
reg |= register_values[i+2] & ~register_values[i+1];
pci_write_config32(register_values[i], reg);
+#endif
}
print_debug("done.\r\n");
}