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authorRudolf Marek <r.marek@assembler.cz>2007-11-02 23:27:12 +0000
committerMarc Jones <marc.jones@amd.com>2007-11-02 23:27:12 +0000
commitec70af6470cc7eff3d416e00a0b9f34f143691fd (patch)
tree9e7629572973e1c6aaf30474d46b2e7c6223f8d5 /src/northbridge/amd/amdk8/amdk8.h
parent1a0025675fadb73219e6bfa3301af69dcb5f0b8b (diff)
This patch changes the "if else" style of parameter matching to table and also changes the rdpreamble parameter, which will cause that more then one DIMM will work for 939 motherboard.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Jordan Crouse <jordan.crouse@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2935 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/amd/amdk8/amdk8.h')
-rw-r--r--src/northbridge/amd/amdk8/amdk8.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/src/northbridge/amd/amdk8/amdk8.h b/src/northbridge/amd/amdk8/amdk8.h
index 095f6eace4..7e2f0b0fc3 100644
--- a/src/northbridge/amd/amdk8/amdk8.h
+++ b/src/northbridge/amd/amdk8/amdk8.h
@@ -134,7 +134,9 @@
#define DCL_D_DRV (1<<1)
#define DCL_QFC_EN (1<<2)
#define DCL_DisDqsHys (1<<3)
+#define DCL_Burst2Opt (1<<5)
#define DCL_DramInit (1<<8)
+#define DCL_DualDIMMen (1<<9)
#define DCL_DramEnable (1<<10)
#define DCL_MemClrStatus (1<<11)
#define DCL_ESR (1<<12)
@@ -147,7 +149,8 @@
#define DCL_DisInRcvrs (1<<24)
#define DCL_BypMax_SHIFT 25
#define DCL_En2T (1<<28)
-
+#define DCL_UpperCSMap (1<<29)
+
#define DRAM_CONFIG_HIGH 0x94
#define DCH_ASYNC_LAT_SHIFT 0
#define DCH_ASYNC_LAT_MASK 0xf